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Re: [Qemu-devel] [PATCH 1/8] [PATCH RFC v3] s390-qemu: cpu hotplug - Def
From: |
Alexander Graf |
Subject: |
Re: [Qemu-devel] [PATCH 1/8] [PATCH RFC v3] s390-qemu: cpu hotplug - Define New SCLP Codes |
Date: |
Thu, 5 Sep 2013 13:25:57 +0200 |
On 01.08.2013, at 16:12, Jason J. Herne wrote:
> From: "Jason J. Herne" <address@hidden>
>
> Define new SCLP codes to improve code readability.
>
> Signed-off-by: Jason J. Herne <address@hidden>
> ---
> hw/s390x/sclp.c | 2 +-
> include/hw/s390x/sclp.h | 8 ++++++++
> 2 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c
> index 86d6ae0..cb53d7e 100644
> --- a/hw/s390x/sclp.c
> +++ b/hw/s390x/sclp.c
> @@ -45,7 +45,7 @@ static void sclp_execute(SCCB *sccb, uint64_t code)
> {
> S390SCLPDevice *sdev = get_event_facility();
>
> - switch (code) {
> + switch (code & SCLP_NO_CMD_PARM) {
switch (code & ~SCLP_CMD_PARM)
Or are the upper bits parm as well? In fact, what about the upper 32 bits?
Alex
> case SCLP_CMDW_READ_SCP_INFO:
> case SCLP_CMDW_READ_SCP_INFO_FORCED:
> read_SCP_info(sccb);
> diff --git a/include/hw/s390x/sclp.h b/include/hw/s390x/sclp.h
> index 231a38a..174097d 100644
> --- a/include/hw/s390x/sclp.h
> +++ b/include/hw/s390x/sclp.h
> @@ -26,6 +26,14 @@
> #define SCLP_CMD_WRITE_EVENT_DATA 0x00760005
> #define SCLP_CMD_WRITE_EVENT_MASK 0x00780005
>
> +/* CPU hotplug SCLP codes */
> +#define SCLP_NO_CMD_PARM 0xffff00ff
> +#define SCLP_HAS_CPU_INFO 0x0C00000000000000ULL
> +#define SCLP_CMDW_READ_CPU_INFO 0x00010001
> +#define SCLP_CMDW_CONFIGURE_CPU 0x00110001
> +#define SCLP_CMDW_DECONFIGURE_CPU 0x00100001
> +#define SCLP_CMDW_CPU_CMD_PARM 0xff00
> +
> /* SCLP response codes */
> #define SCLP_RC_NORMAL_READ_COMPLETION 0x0010
> #define SCLP_RC_NORMAL_COMPLETION 0x0020
> --
> 1.7.10.4
>
- Re: [Qemu-devel] [PATCH 1/8] [PATCH RFC v3] s390-qemu: cpu hotplug - Define New SCLP Codes,
Alexander Graf <=