Re: [Qemu-devel] [PATCH RFC 3/3] hw/pci-host: catch acesses to unassigned pci addresses

[Andreas Färber]

Am 02.09.2013 17:42, schrieb Marcel Apfelbaum:
> On Mon, 2013-09-02 at 15:39 +0100, Peter Maydell wrote:
>> On 2 September 2013 15:13, Marcel Apfelbaum <address@hidden> wrote:
>>> Added a memory region that has negative priority and
>>> extends over all the pci adddress space. This region will
>>> "catch" all the accesses to the unassigned pci
>>> addresses and it will be possible to emulate the
>>> master abort scenario (When no device on the bus claims
>>> the transaction).
>>>
>>> Signed-off-by: Marcel Apfelbaum <address@hidden>
>>> ---
>>>  hw/pci-host/piix.c        |  8 ++++++++
>>>  hw/pci-host/q35.c         | 19 ++++++++++++++++---
>>>  include/hw/pci-host/q35.h |  1 +
>>
>> This is happening at the wrong layer -- you want this memory
>> region to be created and managed in the PCI core code so that
>> we get correct PCI-spec behaviour for all our PCI controllers,
>> not just the two x86 ones you've changed here.pci_address_space
> I saw that the memory regions are part of the Host state and
> duplicated for each host type(like pci_address_space). 
> Question, why are not pci_address_space and pci_hole present
> in a core layer?

I would say, because that core layer didn't exist before I added it not
too long ago. My focus was on fixing bugs at the time and getting PReP
Raven PHB into shape for QOM.

> I followed the existing code; from what you are saying
> I understand that also the existing memory regions 
> like the one mentioned above should be moved in
> the core layer, right?

Consider it all Work In Progress :) and feel free to move more fields
and code there as you guys see fit.

Andreas

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