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Re: [Qemu-devel] [PATCH for-1.6] target-mips: do not raise exceptions wh

From: Stefan Weil
Subject: Re: [Qemu-devel] [PATCH for-1.6] target-mips: do not raise exceptions when accessing invalid memory
Date: Mon, 29 Jul 2013 22:35:31 +0200
User-agent: Mozilla/5.0 (X11; Linux i686; rv:17.0) Gecko/20130623 Thunderbird/17.0.7

Am 27.07.2013 22:58, schrieb Stefan Weil:
> Am 27.07.2013 22:43, schrieb Andreas Färber:
>> Am 27.07.2013 21:37, schrieb Stefan Weil:
>>> Am 27.07.2013 19:43, schrieb Peter Maydell:
>>>> On 27 July 2013 17:18, Hervé Poussineau <address@hidden> wrote:
>>>>> Another solution would be to add a big dummy memory regions on all MIPS 
>>>>> boards
>>>>> to catch memory accesses and not raise an exception. However, this means 
>>>>> that
>>>>> each MIPS board will have its own unassigned memory handler, different 
>>>>> from the
>>>>> global QEMU one.
>>>> Better would be to at least provide fake RAZ/WI implementations of
>>>> devices for the boards, rather than making the dummy region cover
>>>> the whole of the address space. Not 1.6 material, though.

For MIPS Malta, Linux boot can be fixed by handling read access for two


The corresponding definitions in the Linux kernel code seem to be these

#define GCMP_BASE_ADDR                  0x1fbf8000
#define GCMP_ADDRSPACE_SZ               (256 * 1024)
#define GCMP_GCB_GCMPB_OFS              0x0008          /* Global GCMP
Base */

#define MSC01_BIU_REG_BASE              0x1bc80000
#define MSC01_BIU_ADDRSPACE_SZ          (256 * 1024)
#define MSC01_SC_CFG_OFS                0x0110

=> mips_malta.c needs a handler for reads of


Stefan W.

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