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Re: [Qemu-devel] [PATCH v3 11/14] ioport: Switch dispatching to memory c
From: |
Alexander Graf |
Subject: |
Re: [Qemu-devel] [PATCH v3 11/14] ioport: Switch dispatching to memory core layer |
Date: |
Thu, 11 Jul 2013 14:29:48 +0200 |
On 24.06.2013, at 08:07, Jan Kiszka wrote:
> On 2013-06-23 22:50, Hervé Poussineau wrote:
>> Jan Kiszka a écrit :
>>> From: Jan Kiszka <address@hidden>
>>>
>>> The current ioport dispatcher is a complex beast, mostly due to the
>>> need to deal with old portio interface users. But we can overcome it
>>> without converting all portio users by embedding the required base
>>> address of a MemoryRegionPortio access into that data structure. That
>>> removes the need to have the additional MemoryRegionIORange structure
>>> in the loop on every access.
>>>
>>> To handle old portio memory ops, we simply install dispatching handlers
>>> for portio memory regions when registering them with the memory core.
>>> This removes the need for the old_portio field.
>>>
>>> We can drop the additional aliasing of ioport regions and also the
>>> special address space listener. cpu_in and cpu_out now simply call
>>> address_space_read/write. And we can concentrate portio handling in a
>>> single source file.
>>>
>>> Signed-off-by: Jan Kiszka <address@hidden>
>>> ---
>>
>> ...
>>
>>> +
>>> +static void portio_write(void *opaque, hwaddr addr, uint64_t data,
>>> + unsigned size)
>>> +{
>>> + MemoryRegionPortioList *mrpio = opaque;
>>> + const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size,
>>> true);
>>> +
>>> + if (mrp) {
>>> + mrp->write(mrpio->portio_opaque, mrp->base + addr, data);
>>> + } else if (size == 2) {
>>> + mrp = find_portio(mrpio, addr, 1, true);
>>> + assert(mrp);
>>> + mrp->write(mrpio->portio_opaque, mrp->base + addr, data & 0xff);
>>> + mrp->write(mrpio->portio_opaque, mrp->base + addr + 1, data
>>>>> 8);
>>> + }
>>> +}
>>> +
>>> +static const MemoryRegionOps portio_ops = {
>>> + .read = portio_read,
>>> + .write = portio_write,
>>> + .valid.unaligned = true,
>>> + .impl.unaligned = true,
>>> +};
>>> +
>>
>> You need to mark these operations as DEVICE_LITTLE_ENDIAN.
>> In portio_write above, you clearly assume that data is in LE format.
>
> Anything behind PIO is little endian, of course. Will add this.
This patch breaks VGA on PPC as it is in master today.
Alex
>
>>
>> This fixes PPC PReP emulation, which would otherwise be broken with this
>> patchset.
>
> Thanks,
> Jan
>
>
- Re: [Qemu-devel] [PATCH v3 11/14] ioport: Switch dispatching to memory core layer,
Alexander Graf <=
- Re: [Qemu-devel] [PATCH v3 11/14] ioport: Switch dispatching to memory core layer, Alexander Graf, 2013/07/11
- Re: [Qemu-devel] [PATCH v3 11/14] ioport: Switch dispatching to memory core layer, Andreas Färber, 2013/07/11
- Re: [Qemu-devel] [PATCH v3 11/14] ioport: Switch dispatching to memory core layer, Alexander Graf, 2013/07/11
- Re: [Qemu-devel] [PATCH v3 11/14] ioport: Switch dispatching to memory core layer, Alexander Graf, 2013/07/11
- Re: [Qemu-devel] [PATCH v3 11/14] ioport: Switch dispatching to memory core layer, Alexander Graf, 2013/07/11
- Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 11/14] ioport: Switch dispatching to memory core layer, Benjamin Herrenschmidt, 2013/07/11
- Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 11/14] ioport: Switch dispatching to memory core layer, Benjamin Herrenschmidt, 2013/07/11
- Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 11/14] ioport: Switch dispatching to memory core layer, Alexander Graf, 2013/07/11
- Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 11/14] ioport: Switch dispatching to memory core layer, Benjamin Herrenschmidt, 2013/07/12
- Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 11/14] ioport: Switch dispatching to memory core layer, Hervé Poussineau, 2013/07/12