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[Qemu-devel] [PATCH v4 09/15] tcg-arm: Rename use_armv5_instructions to
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v4 09/15] tcg-arm: Rename use_armv5_instructions to use_armvt5_instructions |
Date: |
Thu, 4 Jul 2013 13:40:56 -0700 |
As it really controls the availability of a thumb interworking
instruction on armv5t.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/arm/tcg-target.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index 648137f..cfb9afb 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -43,13 +43,13 @@
defined(__ARM_ARCH_5T__) || \
defined(__ARM_ARCH_5TE__) || \
defined(__ARM_ARCH_5TEJ__)
-#define USE_ARMV5_INSTRUCTIONS
+#define USE_ARMV5T_INSTRUCTIONS
#endif
-#ifdef USE_ARMV5_INSTRUCTIONS
-static const int use_armv5_instructions = 1;
+#ifdef USE_ARMV5T_INSTRUCTIONS
+static const int use_armv5t_instructions = 1;
#else
-static const int use_armv5_instructions = 0;
+static const int use_armv5t_instructions = 0;
#endif
#undef USE_ARMV5_INSTRUCTIONS
@@ -1030,7 +1030,7 @@ static inline void tcg_out_call(TCGContext *s, uint32_t
addr)
if (val - 8 < 0x02000000 && val - 8 >= -0x02000000) {
if (addr & 1) {
/* Use BLX if the target is in Thumb mode */
- if (!use_armv5_instructions) {
+ if (!use_armv5t_instructions) {
tcg_abort();
}
tcg_out_blx_imm(s, val);
@@ -1049,7 +1049,7 @@ static inline void tcg_out_call(TCGContext *s, uint32_t
addr)
static inline void tcg_out_callr(TCGContext *s, int cond, int arg)
{
- if (use_armv5_instructions) {
+ if (use_armv5t_instructions) {
tcg_out_blx(s, cond, arg);
} else {
tcg_out_dat_reg(s, cond, ARITH_MOV, TCG_REG_R14, 0,
--
1.8.1.4
- [Qemu-devel] [PATCH v4 01/15] tcg: Add myself to general TCG maintainership, (continued)
- [Qemu-devel] [PATCH v4 01/15] tcg: Add myself to general TCG maintainership, Richard Henderson, 2013/07/04
- [Qemu-devel] [PATCH v4 03/15] tcg-arm: Don't implement rem, Richard Henderson, 2013/07/04
- [Qemu-devel] [PATCH v4 02/15] tcg: Split rem requirement from div requirement, Richard Henderson, 2013/07/04
- [Qemu-devel] [PATCH v4 04/15] tcg-ppc: Don't implement rem, Richard Henderson, 2013/07/04
- [Qemu-devel] [PATCH v4 05/15] tcg-ppc64: Don't implement rem, Richard Henderson, 2013/07/04
- [Qemu-devel] [PATCH v4 06/15] tcg: Allow non-constant control macros, Richard Henderson, 2013/07/04
- [Qemu-devel] [PATCH v4 07/15] tcg: Simplify logic using TCG_OPF_NOT_PRESENT, Richard Henderson, 2013/07/04
- [Qemu-devel] [PATCH v4 08/15] tcg-arm: Make use of conditional availability of opcodes for divide, Richard Henderson, 2013/07/04
- [Qemu-devel] [PATCH v4 09/15] tcg-arm: Rename use_armv5_instructions to use_armvt5_instructions,
Richard Henderson <=
- [Qemu-devel] [PATCH v4 10/15] tcg-arm: Simplify logic in detecting the ARM ISA in use, Richard Henderson, 2013/07/04
- [Qemu-devel] [PATCH v4 11/15] tcg-arm: Use AT_PLATFORM to detect the host ISA, Richard Henderson, 2013/07/04
- [Qemu-devel] [PATCH v4 12/15] tcg: Fix high_pc fields in .debug_info, Richard Henderson, 2013/07/04
- [Qemu-devel] [PATCH v4 14/15] tcg-i386: Use QEMU_BUILD_BUG_ON instead of assert for frame size, Richard Henderson, 2013/07/04
- [Qemu-devel] [PATCH v4 15/15] tcg-arm: Implement tcg_register_jit, Richard Henderson, 2013/07/04
- [Qemu-devel] [PATCH v4 13/15] tcg: Move the CIE and FDE header definitions to common code, Richard Henderson, 2013/07/04