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Re: [Qemu-devel] [PATCH] target-mips: fix mipsdsp_trunc16_sat16_round
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH] target-mips: fix mipsdsp_trunc16_sat16_round |
Date: |
Thu, 27 Jun 2013 11:20:33 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130514 Thunderbird/17.0.6 |
On 06/17/2013 03:39 PM, Petar Jovanovic wrote:
> - int64_t temp;
> -
> - temp = (int32_t)a + 0x00008000;
> + uint16_t temp;
>
> - if (a > (int)0x7fff8000) {
> - temp = 0x7FFFFFFF;
> + if (a > 0x7FFF7FFF) {
> + temp = 0x7FFF;
> set_DSPControl_overflow_flag(1, 22, env);
> + } else {
> + temp = ((a + 0x8000) >> 16) & 0xFFFF;
This doesn't look right either, as it doesn't properly check for overflow of
negative values. I'd feel better if we implement this function exactly as
documented, modulo actually using 64-bit arithmetic. How about
int32_t temp;
/* Shift right by one, to avoid needing 64-bit arithmetic. As this A is
signed, this creates the copy of the sign bit as documented. */
a >>= 1;
temp = a + 0x4000;
/* Compare temp{31} with temp{30} by xoring into the sign bit. */
if ((temp ^ (temp << 1)) < 0) {
set_DSPControl_overflow_flag(1, 22, env);
return 0x7fff;
}
return temp >> 15;
r~