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[Qemu-devel] [PATCH 05/25] exec: Resolve subpages in one step except for
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PATCH 05/25] exec: Resolve subpages in one step except for IOTLB fills |
Date: |
Thu, 20 Jun 2013 16:44:33 +0200 |
From: Jan Kiszka <address@hidden>
Except for the case of setting the IOTLB entry in TCG mode, we can avoid
the subpage dispatching handlers and do the resolution directly on
address_space_lookup_region. An IOTLB entry describes a full page, not
only the region that the first access to a sub-divided page may return.
This patch therefore introduces a special translation function,
address_space_translate_for_iotlb, that avoids the subpage resolutions.
In contrast, callers of the existing address_space_translate service
will now always receive the terminal memory region section. This will be
important for breaking the BQL and for enabling unaligned memory region.
Signed-off-by: Jan Kiszka <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
cputlb.c | 4 ++--
exec.c | 49 ++++++++++++++++++++++++++++++++++++-------------
include/exec/cputlb.h | 4 ++++
3 files changed, 42 insertions(+), 15 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index 1230e9e..947f17c 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -256,8 +256,8 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr,
}
sz = size;
- section = address_space_translate(&address_space_memory, paddr, &xlat, &sz,
- false);
+ section = address_space_translate_for_iotlb(&address_space_memory, paddr,
+ &xlat, &sz);
assert(sz >= TARGET_PAGE_SIZE);
#if defined(DEBUG_TLB)
diff --git a/exec.c b/exec.c
index 9c6f1fe..a59abc7 100644
--- a/exec.c
+++ b/exec.c
@@ -97,6 +97,13 @@ struct AddressSpaceDispatch {
MemoryListener listener;
};
+#define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
+typedef struct subpage_t {
+ MemoryRegion iomem;
+ hwaddr base;
+ uint16_t sub_section[TARGET_PAGE_SIZE];
+} subpage_t;
+
static MemoryRegionSection *phys_sections;
static unsigned phys_sections_nb, phys_sections_nb_alloc;
static uint16_t phys_section_unassigned;
@@ -220,19 +227,28 @@ bool memory_region_is_unassigned(MemoryRegion *mr)
}
static MemoryRegionSection *address_space_lookup_region(AddressSpace *as,
- hwaddr addr)
+ hwaddr addr,
+ bool resolve_subpage)
{
- return phys_page_find(as->dispatch, addr >> TARGET_PAGE_BITS);
+ MemoryRegionSection *section;
+ subpage_t *subpage;
+
+ section = phys_page_find(as->dispatch, addr >> TARGET_PAGE_BITS);
+ if (resolve_subpage && section->mr->subpage) {
+ subpage = container_of(section->mr, subpage_t, iomem);
+ section = &phys_sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
+ }
+ return section;
}
-MemoryRegionSection *address_space_translate(AddressSpace *as, hwaddr addr,
- hwaddr *xlat, hwaddr *plen,
- bool is_write)
+static MemoryRegionSection *
+address_space_translate_internal(AddressSpace *as, hwaddr addr, hwaddr *xlat,
+ hwaddr *plen, bool resolve_subpage)
{
MemoryRegionSection *section;
Int128 diff;
- section = address_space_lookup_region(as, addr);
+ section = address_space_lookup_region(as, addr, resolve_subpage);
/* Compute offset within MemoryRegionSection */
addr -= section->offset_within_address_space;
@@ -243,6 +259,20 @@ MemoryRegionSection *address_space_translate(AddressSpace
*as, hwaddr addr,
*plen = int128_get64(int128_min(diff, int128_make64(*plen)));
return section;
}
+
+MemoryRegionSection *address_space_translate(AddressSpace *as, hwaddr addr,
+ hwaddr *xlat, hwaddr *plen,
+ bool is_write)
+{
+ return address_space_translate_internal(as, addr, xlat, plen, true);
+}
+
+MemoryRegionSection *
+address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat,
+ hwaddr *plen)
+{
+ return address_space_translate_internal(as, addr, xlat, plen, false);
+}
#endif
void cpu_exec_init_all(void)
@@ -697,13 +727,6 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env,
#if !defined(CONFIG_USER_ONLY)
-#define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
-typedef struct subpage_t {
- MemoryRegion iomem;
- hwaddr base;
- uint16_t sub_section[TARGET_PAGE_SIZE];
-} subpage_t;
-
static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
uint16_t section);
static subpage_t *subpage_init(hwaddr base);
diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h
index e821660..e21cb60 100644
--- a/include/exec/cputlb.h
+++ b/include/exec/cputlb.h
@@ -32,6 +32,10 @@ extern int tlb_flush_count;
/* exec.c */
void tb_flush_jmp_cache(CPUArchState *env, target_ulong addr);
+
+MemoryRegionSection *
+address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat,
+ hwaddr *plen);
hwaddr memory_region_section_get_iotlb(CPUArchState *env,
MemoryRegionSection *section,
target_ulong vaddr,
--
1.8.1.4
- [Qemu-devel] [PULL 00/25] Memory/IOMMU patches, part 3: IOMMU implementation, Paolo Bonzini, 2013/06/20
- [Qemu-devel] [PATCH 01/25] exec.c: address_space_translate: handle access to addr 0 of 2^64 sized region, Paolo Bonzini, 2013/06/20
- [Qemu-devel] [PATCH 02/25] memory: Introduce address_space_lookup_region, Paolo Bonzini, 2013/06/20
- [Qemu-devel] [PATCH 03/25] memory: move private types to exec.c, Paolo Bonzini, 2013/06/20
- [Qemu-devel] [PATCH 04/25] exec: Allow unaligned address_space_rw, Paolo Bonzini, 2013/06/20
- [Qemu-devel] [PATCH 05/25] exec: Resolve subpages in one step except for IOTLB fills,
Paolo Bonzini <=
- [Qemu-devel] [PATCH 06/25] exec: Implement subpage_read/write via address_space_rw, Paolo Bonzini, 2013/06/20
- [Qemu-devel] [PATCH 07/25] exec: return MemoryRegion from address_space_translate, Paolo Bonzini, 2013/06/20
- [Qemu-devel] [PATCH 08/25] Revert "memory: limit sections in the radix tree to the actual address space size", Paolo Bonzini, 2013/06/20
- [Qemu-devel] [PATCH 09/25] Revert "s390x: reduce TARGET_PHYS_ADDR_SPACE_BITS to 62", Paolo Bonzini, 2013/06/20
- [Qemu-devel] [PATCH 10/25] exec: reorganize mem_add to match Int128 version, Paolo Bonzini, 2013/06/20
- [Qemu-devel] [PATCH 12/25] memory: iommu support, Paolo Bonzini, 2013/06/20
- [Qemu-devel] [PATCH 13/25] memory: Add iommu map/unmap notifiers, Paolo Bonzini, 2013/06/20
- [Qemu-devel] [PATCH 11/25] memory: make section size a 128-bit integer, Paolo Bonzini, 2013/06/20
- [Qemu-devel] [PATCH 14/25] vfio: abort if an emulated iommu is used, Paolo Bonzini, 2013/06/20
- [Qemu-devel] [PATCH 16/25] spapr: make IOMMU translation go through IOMMUTLBEntry, Paolo Bonzini, 2013/06/20