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Re: [Qemu-devel] [PATCH] qemu: piix: PCI bridge ACPI hotplug support

From: Michael S. Tsirkin
Subject: Re: [Qemu-devel] [PATCH] qemu: piix: PCI bridge ACPI hotplug support
Date: Tue, 11 Jun 2013 09:55:25 +0300

On Tue, Jun 11, 2013 at 07:33:02AM +0200, Gerd Hoffmann wrote:
>   Hi,
> >        * Use of glib's GArray makes it much easier to build
> >          up tables in code without need for iasl and code patching
> Nice.
> > Design:
> >     - each bus gets assigned a number 0-255
> >     - generated ACPI code writes this number
> >       to a new BSEL register, then uses existing
> >       UP/DOWN registers to probe slot status;
> >       to eject, write number to BSEL register,
> >       then slot into existing EJ
> > 
> >     This is to address the ACPI spec requirement to
> >     avoid config cycle access to any bus except PCI roots.
> > 
> > Portability:
> >     - Non x86 (or any Linux) platforms don't need any of this code.
> >       They can keep happily using SHPC the way
> >       they always did.
> Hmm.  Is is possible to write a SHPC driver in AML?  I think it would be
> alot better to have one guest/host interface for pci bridge hotplug
> instead of two.
> cheers,
>   Gerd

No, it's not possible, SHPC is not designed to be used from ACPI.

Two reasons off the top of my head, there are likely others:

1. SHPC uses regular PCI interrupts to signal events. It does not signal
   GFE and SCI.

2. SHPC uses config accesses to get information from device.
   ACPI does not allow config access anywhere except the root bus from ACPI
   (This requirement is designed to give the OS freedom
   to reconfigure PCI in an arbitrary way).


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