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[Qemu-devel] [PATCH v5 20/33] tcg-ppc64: Implement bswap64
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v5 20/33] tcg-ppc64: Implement bswap64 |
Date: |
Mon, 15 Apr 2013 20:40:59 +0200 |
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/ppc64/tcg-target.c | 35 +++++++++++++++++++++++++++++++++++
tcg/ppc64/tcg-target.h | 2 +-
2 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 1c6be96..ea3209d 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -1714,6 +1714,40 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc,
const TCGArg *args,
}
break;
+ case INDEX_op_bswap64_i64:
+ a0 = args[0], a1 = args[1], a2 = 0;
+ if (a0 == a1) {
+ a0 = 0;
+ a2 = a1;
+ }
+
+ /* a1 = # abcd efgh */
+ /* a0 = rl32(a1, 8) # 0000 fghe */
+ tcg_out_rlw(s, RLWINM, a0, a1, 8, 0, 31);
+ /* a0 = dep(a0, rl32(a1, 24), 0xff000000) # 0000 hghe */
+ tcg_out_rlw(s, RLWIMI, a0, a1, 24, 0, 7);
+ /* a0 = dep(a0, rl32(a1, 24), 0x0000ff00) # 0000 hgfe */
+ tcg_out_rlw(s, RLWIMI, a0, a1, 24, 16, 23);
+
+ /* a0 = rl64(a0, 32) # hgfe 0000 */
+ /* a2 = rl64(a1, 32) # efgh abcd */
+ tcg_out_rld(s, RLDICL, a0, a0, 32, 0);
+ tcg_out_rld(s, RLDICL, a2, a1, 32, 0);
+
+ /* a0 = dep(a0, rl32(a2, 8), 0xffffffff) # hgfe bcda */
+ tcg_out_rlw(s, RLWIMI, a0, a2, 8, 0, 31);
+ /* a0 = dep(a0, rl32(a2, 24), 0xff000000) # hgfe dcda */
+ tcg_out_rlw(s, RLWIMI, a0, a2, 24, 0, 7);
+ /* a0 = dep(a0, rl32(a2, 24), 0x0000ff00) # hgfe dcba */
+ tcg_out_rlw(s, RLWIMI, a0, a2, 24, 16, 23);
+
+ if (a0 == 0) {
+ tcg_out_mov(s, TCG_TYPE_I64, args[0], a0);
+ /* Revert the source rotate that we performed above. */
+ tcg_out_rld(s, RLDICL, a1, a1, 32, 0);
+ }
+ break;
+
default:
tcg_dump_ops (s);
tcg_abort ();
@@ -1823,6 +1857,7 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ INDEX_op_bswap16_i64, { "r", "r" } },
{ INDEX_op_bswap32_i32, { "r", "r" } },
{ INDEX_op_bswap32_i64, { "r", "r" } },
+ { INDEX_op_bswap64_i64, { "r", "r" } },
{ -1 },
};
diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
index 7cd1e98..76001e8 100644
--- a/tcg/ppc64/tcg-target.h
+++ b/tcg/ppc64/tcg-target.h
@@ -102,7 +102,7 @@ typedef enum {
#define TCG_TARGET_HAS_ext32s_i64 1
#define TCG_TARGET_HAS_bswap16_i64 1
#define TCG_TARGET_HAS_bswap32_i64 1
-#define TCG_TARGET_HAS_bswap64_i64 0
+#define TCG_TARGET_HAS_bswap64_i64 1
#define TCG_TARGET_HAS_not_i64 1
#define TCG_TARGET_HAS_neg_i64 1
#define TCG_TARGET_HAS_andc_i64 0
--
1.8.1.4
- [Qemu-devel] [PATCH v5 11/33] tcg-ppc64: Improve constant add and sub ops., (continued)
- [Qemu-devel] [PATCH v5 11/33] tcg-ppc64: Improve constant add and sub ops., Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 12/33] tcg-ppc64: Allow constant first argument to sub, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 13/33] tcg-ppc64: Tidy or and xor patterns., Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 14/33] tcg-ppc64: Improve and_i32 with constant, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 15/33] tcg-ppc64: Improve and_i64 with constant, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 16/33] tcg-ppc64: Use automatic implementation of ext32u_i64, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 17/33] tcg-ppc64: Streamline qemu_ld/st insn selection, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 18/33] tcg-ppc64: Implement rotates, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 19/33] tcg-ppc64: Implement bswap16 and bswap32, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 20/33] tcg-ppc64: Implement bswap64,
Richard Henderson <=
- [Qemu-devel] [PATCH v5 22/33] tcg-ppc64: Handle constant inputs for some compound logicals, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 23/33] tcg-ppc64: Implement deposit, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 24/33] tcg-ppc64: Use I constraint for mul, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 25/33] tcg-ppc64: Use TCGType throughout compares, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 26/33] tcg-ppc64: Cleanup i32 constants to tcg_out_cmp, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 27/33] tcg-ppc64: Use MFOCRF instead of MFCR, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 28/33] tcg-ppc64: Use ISEL for setcond, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 30/33] tcg-ppc64: Use getauxval for ISA detection, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 31/33] tcg-ppc64: Implement add2/sub2_i64, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 32/33] tcg-ppc64: Implement mulu2/muls2_i64, Richard Henderson, 2013/04/15