[Qemu-devel] [PATCH 3/4] tcg-arm: Handle negated constant arguments to and/sub

[Richard Henderson]

This greatly improves code generation for addition of small
negative constants.

Signed-off-by: Richard Henderson <address@hidden>
---
 tcg/arm/tcg-target.c | 31 ++++++++++++++++++++++++++-----
 1 file changed, 26 insertions(+), 5 deletions(-)

diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index 6618571..25d7f5c 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -147,6 +147,7 @@ static void patch_reloc(uint8_t *code_ptr, int type,
 
 #define TCG_CT_CONST_ARM 0x100
 #define TCG_CT_CONST_INV 0x200
+#define TCG_CT_CONST_NEG 0x400
 
 /* parse target specific constraints */
 static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
@@ -161,7 +162,10 @@ static int target_parse_constraint(TCGArgConstraint *ct, 
const char **pct_str)
     case 'K':
          ct->ct |= TCG_CT_CONST_INV;
          break;
-
+    case 'N': /* The gcc constraint letter is L, already used here.  */
+         ct->ct |= TCG_CT_CONST_NEG;
+         break;
+         
     case 'r':
         ct->ct |= TCG_CT_REG;
         tcg_regset_set32(ct->u.regs, 0, (1 << TCG_TARGET_NB_REGS) - 1);
@@ -291,6 +295,8 @@ static inline int tcg_target_const_match(tcg_target_long 
val,
         return 1;
     } else if ((ct & TCG_CT_CONST_INV) && check_fit_imm(~val)) {
         return 1;
+    } else if ((ct & TCG_CT_CONST_NEG) && check_fit_imm(-val)) {
+        return 1;
     } else {
         return 0;
     }
@@ -1643,11 +1649,26 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode 
opc,
                        ARITH_MOV, args[0], 0, args[3], const_args[3]);
         break;
     case INDEX_op_add_i32:
+        a0 = args[0], a1 = args[1], a2 = args[2];
         c = ARITH_ADD;
-        goto gen_arith;
+        if (const_args[2] && check_fit_imm(-a2)) {
+            c = ARITH_SUB, a2 = -a2;
+        }
+        goto gen_arith2;
     case INDEX_op_sub_i32:
+        a0 = args[0], a1 = args[1], a2 = args[2];
         c = ARITH_SUB;
-        goto gen_arith;
+        if (const_args[1]) {
+            if (const_args[2]) {
+                tcg_out_movi32(s, COND_AL, a0, a1 - a2);
+            } else {
+                tcg_out_dat_rI(s, COND_AL, ARITH_RSB, a0, a2, a1, 1);
+            }
+            break;
+        } else if (const_args[2] && check_fit_imm(-a2)) {
+            c = ARITH_ADD, a2 = -a2;
+        }
+        goto gen_arith2;
     case INDEX_op_and_i32:
         a0 = args[0], a1 = args[1], a2 = args[2];
         c = ARITH_AND;
@@ -1851,8 +1872,8 @@ static const TCGTargetOpDef arm_op_defs[] = {
     { INDEX_op_st_i32, { "r", "r" } },
 
     /* TODO: "r", "r", "ri" */
-    { INDEX_op_add_i32, { "r", "r", "rI" } },
-    { INDEX_op_sub_i32, { "r", "r", "rI" } },
+    { INDEX_op_add_i32, { "r", "r", "rIN" } },
+    { INDEX_op_sub_i32, { "r", "rI", "rIN" } },
     { INDEX_op_mul_i32, { "r", "r", "r" } },
     { INDEX_op_mulu2_i32, { "r", "r", "r", "r" } },
     { INDEX_op_muls2_i32, { "r", "r", "r", "r" } },
-- 
1.8.1.2