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Re: [Qemu-devel] [ARM] Cortex-R4F and VFP3-D16
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [ARM] Cortex-R4F and VFP3-D16 |
Date: |
Wed, 27 Feb 2013 16:58:31 +0000 |
On 27 February 2013 16:37, Fabien Chouteau <address@hidden> wrote:
> I'm making my first steps in the ARM world by looking at R4F
> implementation. More specifically I'm trying to add VFP3-D16 support
> which is, as far as I understand, a regular VFP3 with only 16 D
> registers instead of 32.
Andreas was looking at Cortex-R4(F) support a while back; you should
talk to him about how far he got with that (and google for the mailing
list archives for my comments on his patches, probably).
> My question is: where do I check that an instruction is accessing an
> unimplemented register (i.e. d16-31)? It could be in the macro VFP_DREG,
> but it's specification is not clear to me.
Check the ARM ARM and how dregs are encoded into instructions.
VFP_DREG is approximately "set reg to the register number, but return 1
if the encoding isn't valid" where valid here means "accessing d16..d31
in VFP2" (since VFP2 has only 16 dregs).
Probably what you'll want is to have a separate feature bit for 32
dregs which is set by default for vfpv3, and then use that in
VFP_DREG rather than the vfpv3 feature bit.
-- PMM
- [Qemu-devel] [ARM] Cortex-R4F and VFP3-D16, Fabien Chouteau, 2013/02/27
- Re: [Qemu-devel] [ARM] Cortex-R4F and VFP3-D16,
Peter Maydell <=
- Re: [Qemu-devel] [ARM] Cortex-R4F and VFP3-D16, Fabien Chouteau, 2013/02/27
- Re: [Qemu-devel] [ARM] Cortex-R4F and VFP3-D16, Paul Brook, 2013/02/27
- Re: [Qemu-devel] [ARM] Cortex-R4F and VFP3-D16, Fabien Chouteau, 2013/02/28
- Re: [Qemu-devel] [ARM] Cortex-R4F and VFP3-D16, Peter Maydell, 2013/02/28
- Re: [Qemu-devel] [ARM] Cortex-R4F and VFP3-D16, Fabien Chouteau, 2013/02/28
- Re: [Qemu-devel] [ARM] Cortex-R4F and VFP3-D16, Peter Maydell, 2013/02/28