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[Qemu-devel] [PATCH 6/6] gen-icount.h: Rename gen_icount_start/end to ge
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 6/6] gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end |
Date: |
Fri, 22 Feb 2013 18:10:05 +0000 |
The gen_icount_start/end functions are now somewhat misnamed since they
are useful for generic "start/end of TB" code, used for more than just
icount. Rename them to gen_tb_start/end.
Signed-off-by: Peter Maydell <address@hidden>
---
include/exec/gen-icount.h | 4 ++--
target-alpha/translate.c | 4 ++--
target-arm/translate.c | 4 ++--
target-cris/translate.c | 4 ++--
target-i386/translate.c | 4 ++--
target-lm32/translate.c | 4 ++--
target-m68k/translate.c | 4 ++--
target-microblaze/translate.c | 4 ++--
target-mips/translate.c | 4 ++--
target-openrisc/translate.c | 4 ++--
target-ppc/translate.c | 4 ++--
target-s390x/translate.c | 4 ++--
target-sh4/translate.c | 4 ++--
target-sparc/translate.c | 4 ++--
target-unicore32/translate.c | 4 ++--
target-xtensa/translate.c | 4 ++--
16 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
index 384153b..4e3b17b 100644
--- a/include/exec/gen-icount.h
+++ b/include/exec/gen-icount.h
@@ -9,7 +9,7 @@ static TCGArg *icount_arg;
static int icount_label;
static int exitreq_label;
-static inline void gen_icount_start(void)
+static inline void gen_tb_start(void)
{
TCGv_i32 count;
TCGv_i32 flag;
@@ -36,7 +36,7 @@ static inline void gen_icount_start(void)
tcg_temp_free_i32(count);
}
-static void gen_icount_end(TranslationBlock *tb, int num_insns)
+static void gen_tb_end(TranslationBlock *tb, int num_insns)
{
gen_set_label(exitreq_label);
tcg_gen_exit_tb((tcg_target_long)tb + TB_EXIT_REQUESTED);
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index f687b95..1b7ba1d 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -3395,7 +3395,7 @@ static inline void
gen_intermediate_code_internal(CPUAlphaState *env,
if (max_insns == 0)
max_insns = CF_COUNT_MASK;
- gen_icount_start();
+ gen_tb_start();
do {
if (unlikely(!QTAILQ_EMPTY(&env->breakpoints))) {
QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
@@ -3462,7 +3462,7 @@ static inline void
gen_intermediate_code_internal(CPUAlphaState *env,
abort();
}
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
if (search_pc) {
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
diff --git a/target-arm/translate.c b/target-arm/translate.c
index a8893f7..7b48838 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -9761,7 +9761,7 @@ static inline void
gen_intermediate_code_internal(CPUARMState *env,
if (max_insns == 0)
max_insns = CF_COUNT_MASK;
- gen_icount_start();
+ gen_tb_start();
tcg_clear_temp_count();
@@ -9964,7 +9964,7 @@ static inline void
gen_intermediate_code_internal(CPUARMState *env,
}
done_generating:
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
#ifdef DEBUG_DISAS
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 04a5379..1a42a35 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3292,7 +3292,7 @@ gen_intermediate_code_internal(CPUCRISState *env,
TranslationBlock *tb,
max_insns = CF_COUNT_MASK;
}
- gen_icount_start();
+ gen_tb_start();
do {
check_breakpoint(env, dc);
@@ -3433,7 +3433,7 @@ gen_intermediate_code_internal(CPUCRISState *env,
TranslationBlock *tb,
break;
}
}
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
if (search_pc) {
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 112c310..3e45244 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -7972,7 +7972,7 @@ static inline void
gen_intermediate_code_internal(CPUX86State *env,
if (max_insns == 0)
max_insns = CF_COUNT_MASK;
- gen_icount_start();
+ gen_tb_start();
for(;;) {
if (unlikely(!QTAILQ_EMPTY(&env->breakpoints))) {
QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
@@ -8030,7 +8030,7 @@ static inline void
gen_intermediate_code_internal(CPUX86State *env,
}
if (tb->cflags & CF_LAST_IO)
gen_io_end();
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
/* we don't forget to fill the last values */
if (search_pc) {
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index 6b87340..1766210 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -1042,7 +1042,7 @@ static void gen_intermediate_code_internal(CPULM32State
*env,
max_insns = CF_COUNT_MASK;
}
- gen_icount_start();
+ gen_tb_start();
do {
check_breakpoint(env, dc);
@@ -1104,7 +1104,7 @@ static void gen_intermediate_code_internal(CPULM32State
*env,
}
}
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
if (search_pc) {
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 3f1478c..20a86d8 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -2999,7 +2999,7 @@ gen_intermediate_code_internal(CPUM68KState *env,
TranslationBlock *tb,
if (max_insns == 0)
max_insns = CF_COUNT_MASK;
- gen_icount_start();
+ gen_tb_start();
do {
pc_offset = dc->pc - pc_start;
gen_throws_exception = NULL;
@@ -3063,7 +3063,7 @@ gen_intermediate_code_internal(CPUM68KState *env,
TranslationBlock *tb,
break;
}
}
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
#ifdef DEBUG_DISAS
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 12ea820..82c19f0 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1772,7 +1772,7 @@ gen_intermediate_code_internal(CPUMBState *env,
TranslationBlock *tb,
if (max_insns == 0)
max_insns = CF_COUNT_MASK;
- gen_icount_start();
+ gen_tb_start();
do
{
#if SIM_COMPAT
@@ -1896,7 +1896,7 @@ gen_intermediate_code_internal(CPUMBState *env,
TranslationBlock *tb,
break;
}
}
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
if (search_pc) {
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 4ee9615..c7f0935 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -15604,7 +15604,7 @@ gen_intermediate_code_internal (CPUMIPSState *env,
TranslationBlock *tb,
if (max_insns == 0)
max_insns = CF_COUNT_MASK;
LOG_DISAS("\ntb %p idx %d hflags %04x\n", tb, ctx.mem_idx, ctx.hflags);
- gen_icount_start();
+ gen_tb_start();
while (ctx.bstate == BS_NONE) {
if (unlikely(!QTAILQ_EMPTY(&env->breakpoints))) {
QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
@@ -15702,7 +15702,7 @@ gen_intermediate_code_internal (CPUMIPSState *env,
TranslationBlock *tb,
}
}
done_generating:
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
if (search_pc) {
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 1e1b30c..0b4175b 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -1698,7 +1698,7 @@ static inline void
gen_intermediate_code_internal(OpenRISCCPU *cpu,
max_insns = CF_COUNT_MASK;
}
- gen_icount_start();
+ gen_tb_start();
do {
check_breakpoint(cpu, dc);
@@ -1781,7 +1781,7 @@ static inline void
gen_intermediate_code_internal(OpenRISCCPU *cpu,
}
}
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
if (search_pc) {
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 2ac5794..bb5cbdc 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -9654,7 +9654,7 @@ static inline void
gen_intermediate_code_internal(CPUPPCState *env,
if (max_insns == 0)
max_insns = CF_COUNT_MASK;
- gen_icount_start();
+ gen_tb_start();
/* Set env in case of segfault during code fetch */
while (ctx.exception == POWERPC_EXCP_NONE
&& tcg_ctx.gen_opc_ptr < gen_opc_end) {
@@ -9766,7 +9766,7 @@ static inline void
gen_intermediate_code_internal(CPUPPCState *env,
/* Generate the return instruction */
tcg_gen_exit_tb(0);
}
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
if (unlikely(search_pc)) {
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index a57296c..0c58997 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -4770,7 +4770,7 @@ static inline void
gen_intermediate_code_internal(CPUS390XState *env,
max_insns = CF_COUNT_MASK;
}
- gen_icount_start();
+ gen_tb_start();
do {
if (search_pc) {
@@ -4846,7 +4846,7 @@ static inline void
gen_intermediate_code_internal(CPUS390XState *env,
abort();
}
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
if (search_pc) {
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index c58d79a..46464df 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1985,7 +1985,7 @@ gen_intermediate_code_internal(CPUSH4State * env,
TranslationBlock * tb,
max_insns = tb->cflags & CF_COUNT_MASK;
if (max_insns == 0)
max_insns = CF_COUNT_MASK;
- gen_icount_start();
+ gen_tb_start();
while (ctx.bstate == BS_NONE && tcg_ctx.gen_opc_ptr < gen_opc_end) {
if (unlikely(!QTAILQ_EMPTY(&env->breakpoints))) {
QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
@@ -2055,7 +2055,7 @@ gen_intermediate_code_internal(CPUSH4State * env,
TranslationBlock * tb,
}
}
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
if (search_pc) {
i = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index ca75e1a..3e21a17 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -5263,7 +5263,7 @@ static inline void
gen_intermediate_code_internal(TranslationBlock * tb,
max_insns = tb->cflags & CF_COUNT_MASK;
if (max_insns == 0)
max_insns = CF_COUNT_MASK;
- gen_icount_start();
+ gen_tb_start();
do {
if (unlikely(!QTAILQ_EMPTY(&env->breakpoints))) {
QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
@@ -5333,7 +5333,7 @@ static inline void
gen_intermediate_code_internal(TranslationBlock * tb,
tcg_gen_exit_tb(0);
}
}
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
if (spc) {
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
index f4498bc..9b84118 100644
--- a/target-unicore32/translate.c
+++ b/target-unicore32/translate.c
@@ -1982,7 +1982,7 @@ static inline void
gen_intermediate_code_internal(CPUUniCore32State *env,
}
#endif
- gen_icount_start();
+ gen_tb_start();
do {
if (unlikely(!QTAILQ_EMPTY(&env->breakpoints))) {
QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
@@ -2102,7 +2102,7 @@ static inline void
gen_intermediate_code_internal(CPUUniCore32State *env,
}
done_generating:
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
#ifdef DEBUG_DISAS
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 7029ac4..24f1904 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -2924,7 +2924,7 @@ static void gen_intermediate_code_internal(
dc.next_icount = tcg_temp_local_new_i32();
}
- gen_icount_start();
+ gen_tb_start();
if (env->singlestep_enabled && env->exception_taken) {
env->exception_taken = 0;
@@ -3002,7 +3002,7 @@ static void gen_intermediate_code_internal(
if (dc.is_jmp == DISAS_NEXT) {
gen_jumpi(&dc, dc.pc, 0);
}
- gen_icount_end(tb, insn_count);
+ gen_tb_end(tb, insn_count);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
if (search_pc) {
--
1.7.9.5
- [Qemu-devel] [PATCH 0/6] Drop the irredeemably racy cpu_unlink_tb(), Peter Maydell, 2013/02/22
- [Qemu-devel] [PATCH 6/6] gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end,
Peter Maydell <=
- [Qemu-devel] [PATCH 5/6] translate-all.c: Remove cpu_unlink_tb(), Peter Maydell, 2013/02/22
- [Qemu-devel] [PATCH 3/6] cpu-exec: wrap tcg_qemu_tb_exec() in a fn to restore the PC, Peter Maydell, 2013/02/22
- [Qemu-devel] [PATCH 2/6] cpu: Introduce ENV_OFFSET macros, Peter Maydell, 2013/02/22
- Re: [Qemu-devel] [PATCH 2/6] cpu: Introduce ENV_OFFSET macros, Andreas Färber, 2013/02/22
- Re: [Qemu-devel] [PATCH 2/6] cpu: Introduce ENV_OFFSET macros, Peter Maydell, 2013/02/22
- Re: [Qemu-devel] [PATCH 2/6] cpu: Introduce ENV_OFFSET macros, Andreas Färber, 2013/02/24
- Re: [Qemu-devel] [PATCH 2/6] cpu: Introduce ENV_OFFSET macros, Peter Maydell, 2013/02/24
- Re: [Qemu-devel] [PATCH 2/6] cpu: Introduce ENV_OFFSET macros, Andreas Färber, 2013/02/24
- Re: [Qemu-devel] [PATCH 2/6] cpu: Introduce ENV_OFFSET macros, Peter Maydell, 2013/02/24