Re: [Qemu-devel] [RFC PATCH] Distinguish between reset types

[Paolo Bonzini]

Il 19/02/2013 12:40, David Woodhouse ha scritto:
> As discussed at length already, one potential 'workaround' for KVM
> brokenness in old kernels (<3.9) with old CPUs (without 'unrestricted
> guest' support), is to properly reset the PAM registers in the chipset.
> 
> I say 'workaround' but this would be a proper fix in its own right, and
> as a side-effect would help to work around the problem we're actually
> suffering.
> 
> To do it properly, we need to distinguish between a 'hard' reset
> triggered by the PIIX3 RCR register, which resets the PAM configuration,
> and a 'soft' reset triggered for example by the keyboard controller,
> which doesn't.

I think the question is what happens in real hardware?  It is not very
far from the other patch you posted, actually.  The PCIRST# signal of
the PIIX3 must go to the i440FX.

So you can make the hard reset line a qemu_irq (output in PIIX, input in
i440FX) using qdev_init_gpio_in/out.  The input side in the i440FX then
can reset the PAM registers while the output side can pulse it before
calling qemu_system_reset_request() if RCR bit 1 is set.  Then you can
connect it using qdev_connect_gpio_out/qdev_get_gpio_in in
i440fx_common_init.

Paolo