[Qemu-devel] [PATCH moxie 5/5] Top level changes for moxie port

[Anthony Green]

The final patch adds top level changes in support of the new moxie port.

Thanks,

AG


Signed-off-by: Anthony Green <address@hidden>
---
 hw/moxie/Makefile.objs     |   5 ++
 hw/moxiesim.c              | 200 +++++++++++++++++++++++++++++++++++++++++++++
 include/sysemu/arch_init.h |   1 +
 3 files changed, 206 insertions(+)
 create mode 100644 hw/moxie/Makefile.objs
 create mode 100644 hw/moxiesim.c

diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
new file mode 100644
index 0000000..2963363
--- /dev/null
+++ b/hw/moxie/Makefile.objs
@@ -0,0 +1,5 @@
+# moxie boards
+obj-y = moxiesim.o serial.o mc146818rtc.o vga.o
+obj-$(CONFIG_FDT) += device_tree.o
+
+obj-y := $(addprefix ../,$(obj-y))
diff --git a/hw/moxiesim.c b/hw/moxiesim.c
new file mode 100644
index 0000000..feae538
--- /dev/null
+++ b/hw/moxiesim.c
@@ -0,0 +1,200 @@
+/*
+ * QEMU/moxiesim emulation
+ *
+ * Emulates a very simple machine model similiar to the one use by the
+ * GDB moxie simulator.
+ *
+ * Copyright (c) 2008, 2009, 2010 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the
"Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "sysbus.h"
+#include "hw.h"
+#include "pc.h"
+#include "isa.h"
+#include "net/net.h"
+#include "sysemu/sysemu.h"
+#include "boards.h"
+#include "loader.h"
+#include "serial.h"
+#include "exec/address-spaces.h"
+
+#define PHYS_MEM_BASE 0x80000000
+
+static struct _loaderparams {
+    int ram_size;
+    const char *kernel_filename;
+    const char *kernel_cmdline;
+    const char *initrd_filename;
+} loaderparams;
+
+static void load_kernel (CPUMoxieState *env)
+{
+    uint64_t entry, kernel_low, kernel_high;
+    long kernel_size;
+    long initrd_size;
+    ram_addr_t initrd_offset;
+
+    kernel_size = load_elf(loaderparams.kernel_filename,  NULL, NULL,
+                           &entry, &kernel_low, &kernel_high, 1,
ELF_MACHINE, 0);
+    if (kernel_size >= 0)
+      env->pc = (unsigned) entry;
+    else
+      {
+        fprintf(stderr, "qemu: could not load kernel '%s'\n",
+                loaderparams.kernel_filename);
+        exit(1);
+      }
+
+    /* load initrd */
+    initrd_size = 0;
+    initrd_offset = 0;
+    if (loaderparams.initrd_filename) {
+        initrd_size = get_image_size (loaderparams.initrd_filename);
+        if (initrd_size > 0) {
+            initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) &
TARGET_PAGE_MASK;
+            if (initrd_offset + initrd_size > loaderparams.ram_size) {
+                fprintf(stderr,
+                        "qemu: memory too small for initial ram disk '%s'\n",
+                        loaderparams.initrd_filename);
+                exit(1);
+            }
+            initrd_size = load_image_targphys(loaderparams.initrd_filename,
+                                              initrd_offset,
+                                              ram_size);
+        }
+        if (initrd_size == (target_ulong) -1) {
+            fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
+                    loaderparams.initrd_filename);
+            exit(1);
+        }
+    }
+}
+
+static void main_cpu_reset(void *opaque)
+{
+    MoxieCPU *cpu = opaque;
+
+    cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *
+moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
+{
+    DeviceState *dev;
+
+    dev = qdev_create(NULL, "moxie,intc");
+    qdev_prop_set_uint32(dev, "kind-of-intr", kind_of_intr);
+    qdev_init_nofail(dev);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+    return dev;
+}
+
+static void moxiesim_init(QEMUMachineInitArgs *args)
+{
+    MoxieCPU *cpu = NULL;
+    ram_addr_t ram_size = args->ram_size;
+    const char *cpu_model = args->cpu_model;
+    const char *kernel_filename = args->kernel_filename;
+    const char *kernel_cmdline = args->kernel_cmdline;
+    const char *initrd_filename = args->initrd_filename;
+    CPUMoxieState *env;
+    MemoryRegion *address_space_mem = get_system_memory();
+    MemoryRegion *ram = g_new(MemoryRegion, 1);
+    MemoryRegion *rom = g_new(MemoryRegion, 1);
+    hwaddr ram_base = 0x200000;
+#if 0
+    qemu_irq irq[32], *cpu_irq;
+#endif
+
+    /* Init CPUs. */
+    if (cpu_model == NULL) {
+        cpu_model = "moxie1";
+    }
+    cpu = cpu_moxie_init(cpu_model);
+    env = &cpu->env;
+    if (!env) {
+        fprintf(stderr, "Unable to find CPU definition\n");
+        exit(1);
+    }
+    register_savevm(NULL, "cpu", 0, 3, cpu_save, cpu_load, env);
+
+    qemu_register_reset(main_cpu_reset, cpu);
+
+    /* Allocate RAM. */
+    memory_region_init_ram (ram, "moxiesim.ram", ram_size);
+    vmstate_register_ram_global(ram);
+    memory_region_add_subregion(address_space_mem, ram_base, ram);
+
+    memory_region_init_ram(rom, "moxie.rom", 128*0x1000);
+    vmstate_register_ram_global(rom);
+    memory_region_add_subregion(get_system_memory(), 0x1000, rom);
+
+    if (kernel_filename) {
+        loaderparams.ram_size = ram_size;
+        loaderparams.kernel_filename = kernel_filename;
+        loaderparams.kernel_cmdline = kernel_cmdline;
+        loaderparams.initrd_filename = initrd_filename;
+        load_kernel(env);
+    }
+
+    /* Initialize the interrupt controller device.  */
+#if 0
+    cpu_irq = moxie_pic_init_cpu(env);
+    dev = moxie_intc_create(0x81800000, cpu_irq[0], 2);
+    for (i = 0; i < 32; i++) {
+        irq[i] = qdev_get_gpio_in(dev, i);
+    }
+#endif
+
+    /* A single 16450 sits at offset 0x3f8.  */
+    if (serial_hds[0])
+      serial_mm_init(address_space_mem, 0x3f8, 0, env->irq[4],
8000000/16, serial_hds[0], DEVICE_LITTLE_ENDIAN);
+
+#if 0
+    rtc_mm_init(0x400, 0, 0, 0);
+#endif
+}
+#if 0
+void DMA_run(void)
+{
+}
+#endif
+void pic_info(Monitor *mon, const QDict *qdict)
+{
+}
+
+void irq_info(Monitor *mon, const QDict *qdict)
+{
+}
+
+QEMUMachine moxiesim_machine = {
+    .name = "moxiesim",
+    .desc = "Moxie simulator platform",
+    .init = moxiesim_init,
+    .is_default = 1,
+};
+
+static void moxie_machine_init(void)
+{
+    qemu_register_machine(&moxiesim_machine);
+}
+
+machine_init(moxie_machine_init);
diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h
index 5fc780c..2af8dbd 100644
--- a/include/sysemu/arch_init.h
+++ b/include/sysemu/arch_init.h
@@ -20,6 +20,7 @@ enum {
     QEMU_ARCH_XTENSA = 4096,
     QEMU_ARCH_OPENRISC = 8192,
     QEMU_ARCH_UNICORE32 = 0x4000,
+    QEMU_ARCH_MOXIE = 0x8000
 };

 extern const uint32_t arch_type;
--
1.8.1.2

address@hidden qemu]$ cat 0005-Add-top-level-changes-for-moxie.patch
>From 43eb752f105a3c1554234acb54df4e3954d97946 Mon Sep 17 00:00:00 2001
From: Anthony Green <address@hidden>
Date: Wed, 13 Feb 2013 17:07:14 -0500
Subject: [PATCH 5/5] Add top level changes for moxie


Signed-off-by: Anthony Green <address@hidden>
---
 arch_init.c                       |  2 ++
 configure                         | 12 +++++++++++-
 cpu-exec.c                        |  2 ++
 default-configs/moxie-softmmu.mak |  2 ++
 qapi-schema.json                  |  6 +++---
 5 files changed, 20 insertions(+), 4 deletions(-)
 create mode 100644 default-configs/moxie-softmmu.mak

diff --git a/arch_init.c b/arch_init.c
index 8da868b..f82ed2d 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -85,6 +85,8 @@ int graphic_depth = 15;
 #define QEMU_ARCH QEMU_ARCH_MICROBLAZE
 #elif defined(TARGET_MIPS)
 #define QEMU_ARCH QEMU_ARCH_MIPS
+#elif defined(TARGET_MOXIE)
+#define QEMU_ARCH QEMU_ARCH_MOXIE
 #elif defined(TARGET_OPENRISC)
 #define QEMU_ARCH QEMU_ARCH_OPENRISC
 #elif defined(TARGET_PPC)
diff --git a/configure b/configure
index 8789324..d538e62 100755
--- a/configure
+++ b/configure
@@ -950,6 +950,7 @@ mips-softmmu \
 mipsel-softmmu \
 mips64-softmmu \
 mips64el-softmmu \
+moxie-softmmu \
 or32-softmmu \
 ppc-softmmu \
 ppcemb-softmmu \
@@ -3838,7 +3839,7 @@ target_arch2=`echo $target | cut -d '-' -f 1`
 target_bigendian="no"

 case "$target_arch2" in
-  
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
+  
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
   target_bigendian=yes
   ;;
 esac
@@ -3943,6 +3944,11 @@ case "$target_arch2" in
     echo "TARGET_ABI_MIPSN64=y" >> $config_target_mak
     target_long_alignment=8
   ;;
+  moxie)
+    TARGET_ARCH=moxie
+    bflt="yes"
+    target_phys_bits=32
+  ;;
   or32)
     TARGET_ARCH=openrisc
     TARGET_BASE_ARCH=openrisc
@@ -4187,6 +4193,10 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
     echo "CONFIG_MIPS_DIS=y"  >> $config_target_mak
     echo "CONFIG_MIPS_DIS=y"  >> config-all-disas.mak
   ;;
+  moxie*)
+    echo "CONFIG_MOXIE_DIS=y"  >> $config_target_mak
+    echo "CONFIG_MOXIE_DIS=y"  >> config-all-disas.mak
+  ;;
   or32)
     echo "CONFIG_OPENRISC_DIS=y"  >> $config_target_mak
     echo "CONFIG_OPENRISC_DIS=y"  >> config-all-disas.mak
diff --git a/cpu-exec.c b/cpu-exec.c
index 19ebb4a..45118f8 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -220,6 +220,7 @@ int cpu_exec(CPUArchState *env)
 #elif defined(TARGET_LM32)
 #elif defined(TARGET_MICROBLAZE)
 #elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
 #elif defined(TARGET_OPENRISC)
 #elif defined(TARGET_SH4)
 #elif defined(TARGET_CRIS)
@@ -654,6 +655,7 @@ int cpu_exec(CPUArchState *env)
               | env->cc_dest | (env->cc_x << 4);
 #elif defined(TARGET_MICROBLAZE)
 #elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
 #elif defined(TARGET_OPENRISC)
 #elif defined(TARGET_SH4)
 #elif defined(TARGET_ALPHA)
diff --git a/default-configs/moxie-softmmu.mak
b/default-configs/moxie-softmmu.mak
new file mode 100644
index 0000000..d378363
--- /dev/null
+++ b/default-configs/moxie-softmmu.mak
@@ -0,0 +1,2 @@
+# Default configuration for moxie-softmmu
+
diff --git a/qapi-schema.json b/qapi-schema.json
index 7275b5d..a5c858e 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -2938,9 +2938,9 @@
 ##
 { 'enum': 'TargetType',
   'data': [ 'alpha', 'arm', 'cris', 'i386', 'lm32', 'm68k', 'microblazeel',
-            'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'or32',
-            'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4', 'sparc64',
-            'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
+            'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'moxie',
+            'or32', 'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4',
+            'sparc64', 'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }

 ##
 # @TargetInfo:


--
1.8.1.2