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[Qemu-devel] [PATCH V3 5/8] hw/mdio: Mask out read-only bits.
From: |
Grant Likely |
Subject: |
[Qemu-devel] [PATCH V3 5/8] hw/mdio: Mask out read-only bits. |
Date: |
Sat, 2 Feb 2013 23:40:06 +0000 |
The RST and ANEG_RST bits are commands, not settings. An operating
system will get confused (or at least u-boot does) if those bits remain
set after writing to them. Therefore, mask them out on write.
Similarly, no bits in the ID1, ID2, and remote capability registers are
writeable; so mask them out also.
Cc: Peter Maydell <address@hidden>
Cc: Paul Brook <address@hidden>
Cc: Edgar E. Iglesias <address@hidden>
Cc: Anthony Liguori <address@hidden>
Cc: Andreas Färber <address@hidden>
Signed-off-by: Grant Likely <address@hidden>
---
hw/mdio.c | 16 ++++++++++++----
hw/mdio.h | 1 +
2 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/hw/mdio.c b/hw/mdio.c
index 040ecf6..45e271f 100644
--- a/hw/mdio.c
+++ b/hw/mdio.c
@@ -109,17 +109,24 @@ static unsigned int mdio_phy_read(struct qemu_phy *phy,
unsigned int req)
static void mdio_phy_write(struct qemu_phy *phy, unsigned int req, unsigned
int data)
{
- int regnum;
+ int regnum = req & 0x1f;
+ uint16_t mask = phy->regs_readonly_mask[regnum];
- regnum = req & 0x1f;
- D(printf("%s reg[%d] = %x\n", __func__, regnum, data));
+ D(printf("%s reg[%d] = %x; mask=%x\n", __func__, regnum, data, mask));
switch (regnum) {
default:
- phy->regs[regnum] = data;
+ phy->regs[regnum] = (phy->regs[regnum] & mask) | (data & ~mask);
break;
}
}
+static const uint16_t default_readonly_mask[32] = {
+ [PHY_CTRL] = PHY_CTRL_RST | PHY_CTRL_ANEG_RST,
+ [PHY_ID1] = 0xffff,
+ [PHY_ID2] = 0xffff,
+ [PHY_LP_ABILITY] = 0xffff,
+};
+
void mdio_phy_init(struct qemu_phy *phy, uint16_t id1, uint16_t id2)
{
phy->regs[PHY_CTRL] = 0x3100;
@@ -128,6 +135,7 @@ void mdio_phy_init(struct qemu_phy *phy, uint16_t id1,
uint16_t id2)
phy->regs[PHY_ID2] = id2;
/* Autonegotiation advertisement reg. */
phy->regs[PHY_AUTONEG_ADV] = 0x01e1;
+ phy->regs_readonly_mask = default_readonly_mask;
phy->link = 1;
phy->read = mdio_phy_read;
diff --git a/hw/mdio.h b/hw/mdio.h
index 427c9ed..0a6c20a 100644
--- a/hw/mdio.h
+++ b/hw/mdio.h
@@ -55,6 +55,7 @@
struct qemu_phy {
uint32_t regs[NUM_PHY_REGS];
+ const uint16_t *regs_readonly_mask; /* 0=writable, 1=read-only */
int link;
--
1.7.10.4
- [Qemu-devel] [PATCH V3 0/8] Generalize MDIO framework, Grant Likely, 2013/02/02
- [Qemu-devel] [PATCH V3 1/8] hw/etraxfs_eth: Eliminate checkpatch errors, Grant Likely, 2013/02/02
- [Qemu-devel] [PATCH V3 2/8] hw/mdio: Generalize etraxfs MDIO bitbanging emulation, Grant Likely, 2013/02/02
- [Qemu-devel] [PATCH V3 3/8] hw/mdio: Add PHY register definition, Grant Likely, 2013/02/02
- [Qemu-devel] [PATCH V3 4/8] hw/mdio: Generalize phy initialization routine, Grant Likely, 2013/02/02
- [Qemu-devel] [PATCH V3 5/8] hw/mdio: Mask out read-only bits.,
Grant Likely <=
- [Qemu-devel] [PATCH V3 7/8] hw/mdio: Add VMState support, Grant Likely, 2013/02/02
- [Qemu-devel] [PATCH V3 8/8] hw/mdio: Use bitbang core for smc91c111 network device, Grant Likely, 2013/02/02
- [Qemu-devel] [PATCH V3 6/8] hw/mdio: Refactor bitbanging state machine, Grant Likely, 2013/02/02
- Re: [Qemu-devel] [PATCH V3 0/8] Generalize MDIO framework, Edgar E. Iglesias, 2013/02/05