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Re: [Qemu-devel] [PATCH v2 20/20] arm: add generic ROM model for Faraday
From: |
Paul Brook |
Subject: |
Re: [Qemu-devel] [PATCH v2 20/20] arm: add generic ROM model for Faraday SoC platforms |
Date: |
Fri, 25 Jan 2013 21:08:05 +0000 |
User-agent: |
KMail/1.13.7 (Linux/3.7-trunk-amd64; KDE/4.8.4; x86_64; ; ) |
> Since the NAND and SPI flash memories do not support random access,
> so most of the systems which use such memory as main storages
> usually has some bootstrap code stored inside the embedded ROM of
> its SoC, and the bootstrap code is responsible for SDRAM initialization
> and then load the specific software(i.e. u-boot/linux) into SDRAM,
> and finally jumps into the loaded primary software.
No.
For a start the block device you're using is for parallel plash devices, which
are directly mapped. This contradicts your desciption which talks about
serial flash.
Please look at how other boards work. There are already mechanisms for
creating rom areas, or preloading images into ram.
Paul
- [Qemu-devel] [PATCH v2 16/20] arm: add Faraday FTTMR010 timer support, (continued)
[Qemu-devel] [PATCH v2 18/20] arm: add Faraday FTINTC020 interrupt controller, Kuo-Jung Su, 2013/01/25
[Qemu-devel] [PATCH v2 20/20] arm: add generic ROM model for Faraday SoC platforms, Kuo-Jung Su, 2013/01/25
- Re: [Qemu-devel] [PATCH v2 20/20] arm: add generic ROM model for Faraday SoC platforms,
Paul Brook <=
[Qemu-devel] [PATCH v2 14/20] arm: add Faraday FTRTC011 RTC timer support, Kuo-Jung Su, 2013/01/25
[Qemu-devel] [PATCH v2 17/20] arm: add Faraday FTPWMTMR010 timer support, Kuo-Jung Su, 2013/01/25