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[Qemu-devel] [PULL] QOM CPUState patch queue 2012-10-31
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [PULL] QOM CPUState patch queue 2012-10-31 |
Date: |
Wed, 31 Oct 2012 01:59:31 +0100 |
Hello Anthony,
This is my current QOM CPUState queue. Please pull.
This completes Igor's first step of x86 CPU hotplug roadmap:
http://wiki.qemu.org/Features/CPUHotplug
CPU-as-a-device is still under review and blocking CPU properties/subclasses;
I hope to get that in during the Soft Freeze if no problems arise.
Cc: Igor Mammedov <address@hidden>
Cc: Eduardo Habkost <address@hidden>
Cc: Don Slutz <address@hidden>
With Blue and Aurélien having applied sparc/mips prerequisites, I'm including:
* CPUState part 4a series (CPU_COMMON -> CPUState field movements),
* remaining xtensa and ppc prerequisites,
* as well as the remainder of original CPUState part 4 series
except for the final bit depending on TLB rework.
Cc: Max Filippov <address@hidden>
Cc: Alexander Graf <address@hidden>
Regards,
Andreas
The following changes since commit aee0bf7d8d7564f8f2c40e4501695c492b7dd8d1:
tap-win32: stubs to fix win32 build (2012-10-30 19:18:53 +0000)
are available in the git repository at:
git://github.com/afaerber/qemu-cpu.git qom-cpu
for you to fetch changes up to 78585fedbd53b3629150bcf8ab4c9ff32d832460:
target-i386: Pass X86CPU to kvm_handle_halt() (2012-10-31 01:02:46 +0100)
----------------------------------------------------------------
Andreas Färber (32):
target-i386: Inline APIC cpu_env property setting
apic: Store X86CPU in APICCommonState
target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()
cpus: Pass CPUState to qemu_cpu_is_self()
cpus: Pass CPUState to qemu_cpu_kick_thread()
cpu: Move created field to CPUState
cpu: Move stop field to CPUState
ppce500_spin: Store PowerPCCPU in SpinKick
cpu: Move stopped field to CPUState
cpus: Pass CPUState to cpu_is_stopped()
cpus: Pass CPUState to cpu_can_run()
cpu: Move halt_cond to CPUState
cpus: Pass CPUState to qemu_tcg_cpu_thread_fn
cpus: Pass CPUState to qemu_tcg_init_vcpu()
ppc: Pass PowerPCCPU to {ppc6xx,ppc970,power7,ppc40x,ppce500}_set_irq()
target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU
cpus: Pass CPUState to qemu_cpu_kick()
cpu: Move queued_work_{first,last} to CPUState
cpus: Pass CPUState to flush_queued_work()
cpus: Pass CPUState to qemu_wait_io_event_common()
xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
target-ppc: Pass PowerPCCPU to powerpc_excp()
target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall
spapr: Pass PowerPCCPU to spapr_hypercall()
spapr: Pass PowerPCCPU to hypercalls
cpus: Pass CPUState to [qemu_]cpu_has_work()
target-i386: Pass X86CPU to kvm_mce_inject()
target-i386: Pass X86CPU to cpu_x86_inject_mce()
cpus: Pass CPUState to run_on_cpu()
cpu: Move thread_id to CPUState
target-i386: Pass X86CPU to kvm_get_mp_state()
target-i386: Pass X86CPU to kvm_handle_halt()
Igor Mammedov (3):
target-i386: cpu_x86_register(): report error from property setter
target-i386: If x86_cpu_realize() failed, report error and do cleanup
target-i386: Initialize APIC at CPU level
cpu-all.h | 4 -
cpu-defs.h | 6 --
cpu-exec.c | 8 +-
cpus.c | 193 +++++++++++++++++++++++-----------------------
exec.c | 10 ++-
hw/apic.c | 40 ++++++----
hw/apic_common.c | 5 +-
hw/apic_internal.h | 3 +-
hw/kvm/apic.c | 8 +-
hw/kvmvapic.c | 6 +-
hw/pc.c | 56 ++------------
hw/ppc.c | 59 ++++++++------
hw/ppce500_spin.c | 13 ++--
hw/spapr.c | 6 +-
hw/spapr.h | 4 +-
hw/spapr_hcall.c | 40 ++++++----
hw/spapr_iommu.c | 2 +-
hw/spapr_llan.c | 10 +--
hw/spapr_rtas.c | 5 +-
hw/spapr_vio.c | 10 +--
hw/spapr_vty.c | 4 +-
hw/sun4m.c | 2 +-
hw/sun4u.c | 2 +-
hw/xics.c | 11 ++-
hw/xtensa_pic.c | 9 ++-
include/qemu/cpu.h | 58 ++++++++++++++
kvm-all.c | 13 +++-
monitor.c | 6 +-
qemu-common.h | 2 -
target-alpha/cpu.c | 2 +-
target-alpha/cpu.h | 4 +-
target-arm/cpu.h | 4 +-
target-cris/cpu.h | 4 +-
target-i386/cpu.c | 63 ++++++++++++++-
target-i386/cpu.h | 10 ++-
target-i386/helper.c | 16 ++--
target-i386/kvm.c | 28 ++++---
target-lm32/cpu.h | 4 +-
target-m68k/cpu.h | 4 +-
target-microblaze/cpu.h | 4 +-
target-mips/cpu.h | 11 +--
target-openrisc/cpu.h | 4 +-
target-ppc/cpu.h | 6 +-
target-ppc/excp_helper.c | 40 +++++-----
target-ppc/kvm.c | 12 ++-
target-s390x/cpu.h | 4 +-
target-s390x/kvm.c | 2 +-
target-sh4/cpu.h | 4 +-
target-sparc/cpu.h | 4 +-
target-unicore32/cpu.c | 2 +-
target-unicore32/cpu.h | 4 +-
target-xtensa/cpu.h | 4 +-
52 Dateien geändert, 501 Zeilen hinzugefügt(+), 334 Zeilen entfernt(-)
- [Qemu-devel] [PULL] QOM CPUState patch queue 2012-10-31,
Andreas Färber <=
- [Qemu-devel] [PATCH 04/35] target-i386: Inline APIC cpu_env property setting, Andreas Färber, 2012/10/30
- [Qemu-devel] [PATCH 01/35] target-i386: cpu_x86_register(): report error from property setter, Andreas Färber, 2012/10/30
- [Qemu-devel] [PATCH 02/35] target-i386: If x86_cpu_realize() failed, report error and do cleanup, Andreas Färber, 2012/10/30
- [Qemu-devel] [PATCH 03/35] target-i386: Initialize APIC at CPU level, Andreas Färber, 2012/10/30
- [Qemu-devel] [PATCH 09/35] cpu: Move created field to CPUState, Andreas Färber, 2012/10/30
- [Qemu-devel] [PATCH 08/35] cpus: Pass CPUState to qemu_cpu_kick_thread(), Andreas Färber, 2012/10/30
- [Qemu-devel] [PATCH 13/35] cpus: Pass CPUState to cpu_is_stopped(), Andreas Färber, 2012/10/30
- [Qemu-devel] [PATCH 06/35] target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi(), Andreas Färber, 2012/10/30
- [Qemu-devel] [PATCH 14/35] cpus: Pass CPUState to cpu_can_run(), Andreas Färber, 2012/10/30
- [Qemu-devel] [PATCH 16/35] cpus: Pass CPUState to qemu_tcg_cpu_thread_fn, Andreas Färber, 2012/10/30