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[Qemu-devel] [PATCH 10/11] linux-user: ppc: mark as long long aligned


From: riku . voipio
Subject: [Qemu-devel] [PATCH 10/11] linux-user: ppc: mark as long long aligned
Date: Thu, 18 Oct 2012 14:31:06 +0300

From: Alexander Graf <address@hidden>

The SysV PPC32 ABI dictates that long long (64bit) parameters are pass in 
odd/even
register pairs. Because unlike ARM and MIPS we start at an odd register number,
we can reuse the same aligning code that ARM and MIPS use.

Clarified inline comment that it is SysV ABI that requires long long aligned
parameters - Riku

Signed-off-by: Alexander Graf <address@hidden>
Signed-off-by: Riku Voipio <address@hidden>
---
 linux-user/syscall.c |    7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 009bf8f..3da8e51 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -587,12 +587,17 @@ extern int setfsgid(int);
 extern int setgroups(int, gid_t *);
 
 /* ARM EABI and MIPS expect 64bit types aligned even on pairs or registers */
-#ifdef TARGET_ARM 
+#ifdef TARGET_ARM
 static inline int regpairs_aligned(void *cpu_env) {
     return ((((CPUARMState *)cpu_env)->eabi) == 1) ;
 }
 #elif defined(TARGET_MIPS)
 static inline int regpairs_aligned(void *cpu_env) { return 1; }
+#elif defined(TARGET_PPC) && !defined(TARGET_PPC64)
+/* SysV AVI for PPC32 expects 64bit parameters to be passed on odd/even pairs
+ * of registers which translates to the same as ARM/MIPS, because we start with
+ * r3 as arg1 */
+static inline int regpairs_aligned(void *cpu_env) { return 1; }
 #else
 static inline int regpairs_aligned(void *cpu_env) { return 0; }
 #endif
-- 
1.7.9.5




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