Re: [Qemu-devel] [PATCH] PPC: e500: Only expose even TLB sizes in initial TLB

[Aurelien Jarno]

On Thu, Oct 04, 2012 at 06:55:35PM +0200, Alexander Graf wrote:
> When booting our e500 machine, we automatically generate a big TLB entry
> in TLB1 that covers all of the code we need to run in there until the guest
> can handle its TLB on its own.
> 
> However, e500v2 can only handle MAS1.0 sizes. However, we keep our TLB
> information in MAS2.0 layout, which means we have twice as many TLB sizes
> to choose from. That also means we can run into a situation where we try
> to add a TLB size that could not fit into the MAS1.0 size bits.
> 
> Fix it by making sure we always have the lower bit set to 0. That way we
> are always guaranteed to have MAS1.0 compatible TLB size information.
> 
> Signed-off-by: Alexander Graf <address@hidden>
> ---
>  hw/ppc/e500.c |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
> 
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index feb712e..d23f9b2 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -362,6 +362,10 @@ static void mmubooke_create_initial_mapping(CPUPPCState 
> *env)
>         the device tree top */
>      dt_end = bi->dt_base + bi->dt_size;
>      ps = booke206_page_size_to_tlb(dt_end) + 1;
> +    if (ps & 1) {
> +        /* e500v2 can only do even TLB size bits */
> +        ps++;
> +    }
>      size = (ps << MAS1_TSIZE_SHIFT);
>      tlb->mas1 = MAS1_VALID | size;
>      tlb->mas2 = 0;

Applied (actually as part of the PPC pull).


-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
address@hidden                 http://www.aurel32.net