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[Qemu-devel] [PATCH 2/8] target-arm: Reinstate display of VFP registers
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 2/8] target-arm: Reinstate display of VFP registers in cpu_dump_state |
Date: |
Fri, 5 Oct 2012 15:35:20 +0100 |
Reinstate the display of VFP registers in cpu_dump_state(), if
the CPU has them (this code had been #if 0'd out a for a long time).
We drop the attempt ot display the values as floating point, since
this makes assumptions about the host 'float' and 'double' formats
and is not done by eg the i386 cpu_dump_state().
This display is gated on the CPU_DUMP_FPU flag, as for x86.
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/translate.c | 42 ++++++++++++++++--------------------------
1 file changed, 16 insertions(+), 26 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 5fded49..bb53e35 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -9970,19 +9970,6 @@ void cpu_dump_state(CPUARMState *env, FILE *f,
fprintf_function cpu_fprintf,
int flags)
{
int i;
-#if 0
- union {
- uint32_t i;
- float s;
- } s0, s1;
- CPU_DoubleU d;
- /* ??? This assumes float64 and double have the same layout.
- Oh well, it's only debug dumps. */
- union {
- float64 f64;
- double d;
- } d0;
-#endif
uint32_t psr;
for(i=0;i<16;i++) {
@@ -10002,20 +9989,23 @@ void cpu_dump_state(CPUARMState *env, FILE *f,
fprintf_function cpu_fprintf,
psr & CPSR_T ? 'T' : 'A',
cpu_mode_names[psr & 0xf], (psr & 0x10) ? 32 : 26);
-#if 0
- for (i = 0; i < 16; i++) {
- d.d = env->vfp.regs[i];
- s0.i = d.l.lower;
- s1.i = d.l.upper;
- d0.f64 = d.d;
- cpu_fprintf(f, "s%02d=%08x(%8g) s%02d=%08x(%8g) d%02d=%08x%08x(%8g)\n",
- i * 2, (int)s0.i, s0.s,
- i * 2 + 1, (int)s1.i, s1.s,
- i, (int)(uint32_t)d.l.upper, (int)(uint32_t)d.l.lower,
- d0.d);
+ if (flags & CPU_DUMP_FPU) {
+ int numvfpregs = 0;
+ if (arm_feature(env, ARM_FEATURE_VFP)) {
+ numvfpregs += 16;
+ }
+ if (arm_feature(env, ARM_FEATURE_VFP3)) {
+ numvfpregs += 16;
+ }
+ for (i = 0; i < numvfpregs; i++) {
+ uint64_t v = float64_val(env->vfp.regs[i]);
+ cpu_fprintf(f, "s%02d=%08x s%02d=%08x d%02d=%016" PRIx64 "\n",
+ i * 2, (uint32_t)v,
+ i * 2 + 1, (uint32_t)(v >> 32),
+ i, v);
+ }
+ cpu_fprintf(f, "FPSCR: %08x\n", (int)env->vfp.xregs[ARM_VFP_FPSCR]);
}
- cpu_fprintf(f, "FPSCR: %08x\n", (int)env->vfp.xregs[ARM_VFP_FPSCR]);
-#endif
}
void restore_state_to_opc(CPUARMState *env, TranslationBlock *tb, int pc_pos)
--
1.7.9.5
- [Qemu-devel] [PULL 0/8] target-arm queue, Peter Maydell, 2012/10/05
- [Qemu-devel] [PATCH 7/8] target-arm: use deposit instead of hardcoded version, Peter Maydell, 2012/10/05
- [Qemu-devel] [PATCH 4/8] target-arm: convert add_cc and sub_cc helpers to TCG, Peter Maydell, 2012/10/05
- [Qemu-devel] [PATCH 6/8] target-arm: mark a few integer helpers const and pure, Peter Maydell, 2012/10/05
- [Qemu-devel] [PATCH 8/8] target-arm: Drop unused DECODE_CPREG_CRN macro, Peter Maydell, 2012/10/05
- [Qemu-devel] [PATCH 2/8] target-arm: Reinstate display of VFP registers in cpu_dump_state,
Peter Maydell <=
- [Qemu-devel] [PATCH 5/8] target-arm: convert sar, shl and shr helpers to TCG, Peter Maydell, 2012/10/05
- [Qemu-devel] [PATCH 3/8] target-arm: use globals for CC flags, Peter Maydell, 2012/10/05
- [Qemu-devel] [PATCH 1/8] cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to generic, Peter Maydell, 2012/10/05
- Re: [Qemu-devel] [PULL 0/8] target-arm queue, Aurelien Jarno, 2012/10/06