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[Qemu-devel] [PATCH 059/147] target-s390: Convert CLCLE, MVCLE
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 059/147] target-s390: Convert CLCLE, MVCLE |
Date: |
Thu, 27 Sep 2012 16:51:19 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
target-s390x/insn-data.def | 4 ++++
target-s390x/translate.c | 50 ++++++++++++++++++++++------------------------
2 files changed, 28 insertions(+), 26 deletions(-)
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def
index 2e09838..4d7f862 100644
--- a/target-s390x/insn-data.def
+++ b/target-s390x/insn-data.def
@@ -132,6 +132,8 @@
C(0xc60e, CLGFRL, RIL_b, GIE, r1_o, mri2_32u, 0, 0, 0, cmpu64)
C(0xc607, CLHRL, RIL_b, GIE, r1_o, mri2_16u, 0, 0, 0, cmpu32)
C(0xc606, CLGHRL, RIL_b, GIE, r1_o, mri2_16u, 0, 0, 0, cmpu64)
+/* COMPARE LOGICAL LONG EXTENDED */
+ C(0xa900, CLCLE, RS_a, Z, 0, a2, 0, 0, clcle, 0)
/* CONVERT TO DECIMAL */
C(0x4e00, CVD, RX_a, Z, r1_o, a2, 0, 0, cvd, 0)
@@ -291,6 +293,8 @@
C(0xeb52, MVIY, SIY, LD, la1, i2, 0, m1_8, mov2, 0)
/* MOVE LONG */
C(0x0e00, MVCL, RR_a, Z, 0, 0, 0, 0, mvcl, 0)
+/* MOVE LONG EXTENDED */
+ C(0xa800, MVCLE, RS_a, Z, 0, a2, 0, 0, mvcle, 0)
/* MULTIPLY */
C(0x1c00, MR, RR_a, Z, r1p1_32s, r2_32s, new, r1_D32, mul, 0)
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index f583020..8e63721 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -2233,32 +2233,6 @@ static void disas_s390_insn(CPUS390XState *env,
DisasContext *s)
LOG_DISAS("opc 0x%x\n", opc);
switch (opc) {
- case 0xa8: /* MVCLE R1,R3,D2(B2) [RS] */
- insn = ld_code4(env, s->pc);
- decode_rs(s, insn, &r1, &r3, &b2, &d2);
- tmp = get_address(s, 0, b2, d2);
- tmp32_1 = tcg_const_i32(r1);
- tmp32_2 = tcg_const_i32(r3);
- potential_page_fault(s);
- gen_helper_mvcle(cc_op, cpu_env, tmp32_1, tmp, tmp32_2);
- set_cc_static(s);
- tcg_temp_free_i64(tmp);
- tcg_temp_free_i32(tmp32_1);
- tcg_temp_free_i32(tmp32_2);
- break;
- case 0xa9: /* CLCLE R1,R3,D2(B2) [RS] */
- insn = ld_code4(env, s->pc);
- decode_rs(s, insn, &r1, &r3, &b2, &d2);
- tmp = get_address(s, 0, b2, d2);
- tmp32_1 = tcg_const_i32(r1);
- tmp32_2 = tcg_const_i32(r3);
- potential_page_fault(s);
- gen_helper_clcle(cc_op, cpu_env, tmp32_1, tmp, tmp32_2);
- set_cc_static(s);
- tcg_temp_free_i64(tmp);
- tcg_temp_free_i32(tmp32_1);
- tcg_temp_free_i32(tmp32_2);
- break;
#ifndef CONFIG_USER_ONLY
case 0xae: /* SIGP R1,R3,D2(B2) [RS] */
check_privileged(s);
@@ -3028,6 +3002,18 @@ static ExitStatus op_bct64(DisasContext *s, DisasOps *o)
return help_branch(s, &c, is_imm, imm, o->in2);
}
+static ExitStatus op_clcle(DisasContext *s, DisasOps *o)
+{
+ TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
+ TCGv_i32 r3 = tcg_const_i32(get_field(s->fields, r3));
+ potential_page_fault(s);
+ gen_helper_clcle(cc_op, cpu_env, r1, o->in2, r3);
+ tcg_temp_free_i32(r1);
+ tcg_temp_free_i32(r3);
+ set_cc_static(s);
+ return NO_EXIT;
+}
+
static ExitStatus op_cvd(DisasContext *s, DisasOps *o)
{
TCGv_i64 t1 = tcg_temp_new_i64();
@@ -3348,6 +3334,18 @@ static ExitStatus op_mvcl(DisasContext *s, DisasOps *o)
return NO_EXIT;
}
+static ExitStatus op_mvcle(DisasContext *s, DisasOps *o)
+{
+ TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
+ TCGv_i32 r3 = tcg_const_i32(get_field(s->fields, r3));
+ potential_page_fault(s);
+ gen_helper_mvcle(cc_op, cpu_env, r1, o->in2, r3);
+ tcg_temp_free_i32(r1);
+ tcg_temp_free_i32(r3);
+ set_cc_static(s);
+ return NO_EXIT;
+}
+
static ExitStatus op_mul(DisasContext *s, DisasOps *o)
{
tcg_gen_mul_i64(o->out, o->in1, o->in2);
--
1.7.11.4
- [Qemu-devel] [PATCH 050/147] target-s390: Convert LOAD PSW, (continued)
- [Qemu-devel] [PATCH 050/147] target-s390: Convert LOAD PSW, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 051/147] target-s390: Convert DIAGNOSE, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 024/147] target-s390: Convert LOAD, LOAD LOGICAL, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 052/147] target-s390: Convert SHIFT, ROTATE SINGLE, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 053/147] target-s390: Convert SHIFT DOUBLE, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 054/147] target-s390: Convert LOAD, STORE MULTIPLE, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 055/147] target-s390: Convert MOVE, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 056/147] target-s390: Convert NI, XI, OI, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 057/147] target-s390: Convert STNSM, STOSM, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 058/147] target-s390: Convert LAM, STAM, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 059/147] target-s390: Convert CLCLE, MVCLE,
Richard Henderson <=
- [Qemu-devel] [PATCH 060/147] target-s390: Convert MVC, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 061/147] target-s390: Convert NC, XC, OC, TR, UNPK, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 062/147] target-s390: Convert CLC, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 063/147] target-s390: Convert MVCP, MVCS, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 064/147] target-s390: Convert LRA, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 065/147] target-s390: Convert SIGP, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 029/147] target-s390: Convert LOAD COMPLIMENT, POSITIVE, NEGATIVE, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 066/147] target-s390: Convert EFPC, STFPC, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 067/147] target-s390: Convert LCTL, STCTL, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 068/147] target-s390: Convert COMPARE AND SWAP, Richard Henderson, 2012/09/27