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Re: [Qemu-devel] [Qemu-ppc] [PATCH 3/6] target-ppc: Extend FPU state for
From: |
David Gibson |
Subject: |
Re: [Qemu-devel] [Qemu-ppc] [PATCH 3/6] target-ppc: Extend FPU state for newer POWER CPUs |
Date: |
Thu, 27 Sep 2012 10:03:04 +1000 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Wed, Sep 26, 2012 at 08:36:45AM +0200, Aurelien Jarno wrote:
> On Wed, Sep 26, 2012 at 01:12:18PM +1000, David Gibson wrote:
> > This patch adds some extra FPU state to CPUPPCState. Specifically, fpscr
> > is extended to 64 bits, since some recent CPUs now have more status bits
> > than fit inside 64 bits, and we add the 32 VSR registers present on CPUs
> > with VSX (these extend the standard FP regs, which together with the
> > Altivec/VMX registers form a 64 x 128bit register file for VSX).
> >
> > We don't actually support the instructions using these extra registers in
> > TCG yet, but we still a place to store the state so we can sync it with
> > KVM and savevm/loadvm it. This patch updates the savevm code to not
> > fail on the extended state, but also does not actually save it - that's
> > a project for another patch.
> >
> > Signed-off-by: David Gibson <address@hidden>
> > ---
> > target-ppc/cpu.h | 4 +++-
> > target-ppc/machine.c | 8 ++++++--
> > target-ppc/translate.c | 2 +-
> > 3 files changed, 10 insertions(+), 4 deletions(-)
> >
> > diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
> > index faf4404..846778f 100644
> > --- a/target-ppc/cpu.h
> > +++ b/target-ppc/cpu.h
> > @@ -963,7 +963,7 @@ struct CPUPPCState {
> > /* floating point registers */
> > float64 fpr[32];
> > /* floating point status and control register */
> > - uint32_t fpscr;
> > + uint64_t fpscr;
>
> This will break the TCG code, as fpscr is mapped as an i32 in TCG. Also
> if it is 64-bit only on PPC64 machines, it might be a good idea to
> change it to target_ulong instead, and use _tl in the TCG code.
Ah, good point, thanks for catching that. Both changes made for the
next version.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
- [Qemu-devel] [0/6] Pending pseries updates, David Gibson, 2012/09/25
- [Qemu-devel] [PATCH 2/6] target-ppc: Remove unused power_mode field from cpu state, David Gibson, 2012/09/25
- [Qemu-devel] [PATCH 1/6] pseries: Set hash table size based on RAM size, David Gibson, 2012/09/25
- [Qemu-devel] [PATCH 6/6] ppc/pseries: Reset VPA registration on CPU reset, David Gibson, 2012/09/25
- [Qemu-devel] [PATCH 3/6] target-ppc: Extend FPU state for newer POWER CPUs, David Gibson, 2012/09/25
- [Qemu-devel] [PATCH 4/6] pseries: Implement PAPR NVRAM, David Gibson, 2012/09/25
- [Qemu-devel] [PATCH 5/6] pseries: Don't test for MSR_PR for hypercalls under KVM, David Gibson, 2012/09/25
- Re: [Qemu-devel] [0/6] Pending pseries updates, Alexander Graf, 2012/09/26