[Qemu-devel] [PATCH 2/2] tcg: Streamline movcond_i64 using movcond_i32

[Richard Henderson]

When movcond_i32 is available we can further reduce the generated
op count from 12 to 6, and the generated code size on i686 from
88 to 74 bytes.

Signed-off-by: Richard Henderson <address@hidden>
---
 tcg/tcg-op.h | 22 +++++++++++++++-------
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index c32646e..9ee16e7 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -2147,16 +2147,24 @@ static inline void tcg_gen_movcond_i64(TCGCond cond, 
TCGv_i64 ret,
     tcg_gen_op6i_i32(INDEX_op_setcond2_i32, t0,
                      TCGV_LOW(c1), TCGV_HIGH(c1),
                      TCGV_LOW(c2), TCGV_HIGH(c2), cond);
-    tcg_gen_neg_i32(t0, t0);
 
-    tcg_gen_and_i32(t1, TCGV_LOW(v1), t0);
-    tcg_gen_andc_i32(TCGV_LOW(ret), TCGV_LOW(v2), t0);
-    tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t1);
+    if (TCG_TARGET_HAS_movcond_i32) {
+        tcg_gen_movi_i32(t1, 0);
+        tcg_gen_movcond_i32(TCG_COND_NE, TCGV_LOW(ret), t0, t1,
+                            TCGV_LOW(v1), TCGV_LOW(v2));
+        tcg_gen_movcond_i32(TCG_COND_NE, TCGV_HIGH(ret), t0, t1,
+                            TCGV_HIGH(v1), TCGV_HIGH(v2));
+    } else {
+        tcg_gen_neg_i32(t0, t0);
 
-    tcg_gen_and_i32(t1, TCGV_HIGH(v1), t0);
-    tcg_gen_andc_i32(TCGV_HIGH(ret), TCGV_HIGH(v2), t0);
-    tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t1);
+        tcg_gen_and_i32(t1, TCGV_LOW(v1), t0);
+        tcg_gen_andc_i32(TCGV_LOW(ret), TCGV_LOW(v2), t0);
+        tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t1);
 
+        tcg_gen_and_i32(t1, TCGV_HIGH(v1), t0);
+        tcg_gen_andc_i32(TCGV_HIGH(ret), TCGV_HIGH(v2), t0);
+        tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t1);
+    }
     tcg_temp_free_i32(t0);
     tcg_temp_free_i32(t1);
 #else
-- 
1.7.11.4