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[Qemu-devel] [PATCH v3 01/10] softfloat: make float_muladd_negate_* flag
From: |
Max Filippov |
Subject: |
[Qemu-devel] [PATCH v3 01/10] softfloat: make float_muladd_negate_* flags independent |
Date: |
Wed, 19 Sep 2012 04:23:50 +0400 |
Flags passed into float{32,64}_muladd are treated as bits; assign
independent bits to float_muladd_negate_* to allow precise control over
what gets negated in float{32,64}_muladd.
Signed-off-by: Max Filippov <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
---
fpu/softfloat.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/fpu/softfloat.h b/fpu/softfloat.h
index feec3a1..2860ca0 100644
--- a/fpu/softfloat.h
+++ b/fpu/softfloat.h
@@ -219,7 +219,7 @@ void float_raise( int8 flags STATUS_PARAM);
enum {
float_muladd_negate_c = 1,
float_muladd_negate_product = 2,
- float_muladd_negate_result = 3,
+ float_muladd_negate_result = 4,
};
/*----------------------------------------------------------------------------
--
1.7.7.6
- [Qemu-devel] [PATCH v3 00/10] target-xtensa: implement FP coprocessor option, Max Filippov, 2012/09/18
- [Qemu-devel] [PATCH v3 01/10] softfloat: make float_muladd_negate_* flags independent,
Max Filippov <=
- [Qemu-devel] [PATCH v3 02/10] softfloat: add NO_SIGNALING_NANS, Max Filippov, 2012/09/18
- [Qemu-devel] [PATCH v3 03/10] target-xtensa: handle boolean option in overlays, Max Filippov, 2012/09/18
- [Qemu-devel] [PATCH v3 04/10] target-xtensa: specialize softfloat NaN rules, Max Filippov, 2012/09/18
- [Qemu-devel] [PATCH v3 05/10] target-xtensa: add FP registers, Max Filippov, 2012/09/18
- [Qemu-devel] [PATCH v3 06/10] target-xtensa: implement LSCX and LSCI groups, Max Filippov, 2012/09/18
- [Qemu-devel] [PATCH v3 07/10] target-xtensa: implement FP0 arithmetic, Max Filippov, 2012/09/18
- [Qemu-devel] [PATCH v3 08/10] target-xtensa: implement FP0 conversions, Max Filippov, 2012/09/18
- [Qemu-devel] [PATCH v3 09/10] target-xtensa: implement FP1 group, Max Filippov, 2012/09/18