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Re: [Qemu-devel] [PATCH v5 09/15] hw: Added generic FIFO API.
From: |
Peter Crosthwaite |
Subject: |
Re: [Qemu-devel] [PATCH v5 09/15] hw: Added generic FIFO API. |
Date: |
Tue, 7 Aug 2012 16:10:31 +1000 |
>> +
>> +extern const VMStateDescription vmstate_fifo8;
>> +
>> +#define VMSTATE_FIFO8(_field, _state) { \
>> + .name = (stringify(_field)), \
>> + .size = sizeof(Fifo8), \
>> + .vmsd = &vmstate_fifo8, \
>> + .flags = VMS_STRUCT, \
>> + .offset = vmstate_offset_value(_state, _field, Fifo8), \
>> +}
>
>
> how about implementing this as a wrapper to VMSTATE_STRUCT_TEST() macro
> instead?
This has no existing precedent in QEMU so I am unsure of what you mean?
And maybe this should go to vmstate.h header
I disagree. All other clients of VMS_STRUCT are out in their repective
device specific headers (pci.h, i2c.h) etc. Unless this is new
established policy, I dont really want to change the current adopted
approach.
Regards,
Peter
>
>
>> +
>> +#endif /* FIFO_H */
>
>
- Re: [Qemu-devel] [PATCH v5 05/15] qdev: allow multiple qdev_init_gpio_in() calls, (continued)
[Qemu-devel] [PATCH v5 11/15] xilinx_spi: Initial impl. of Xilinx SPI controller, Peter A. G. Crosthwaite, 2012/08/05
[Qemu-devel] [PATCH v5 13/15] xilinx_spips: Xilinx Zynq SPI cntrlr device model, Peter A. G. Crosthwaite, 2012/08/05
[Qemu-devel] [PATCH v5 14/15] xilinx_zynq: Added SPI controllers + flashes, Peter A. G. Crosthwaite, 2012/08/05
[Qemu-devel] [PATCH v5 15/15] MAINTAINERS: Added maintainerships for SSI, Peter A. G. Crosthwaite, 2012/08/05
[Qemu-devel] [PATCH v5 10/15] m25p80: Initial implementation of SPI flash device, Peter A. G. Crosthwaite, 2012/08/05
[Qemu-devel] [PATCH v5 07/15] stellaris: Removed SSI mux, Peter A. G. Crosthwaite, 2012/08/05
[Qemu-devel] [PATCH v5 12/15] petalogix-ml605: added SPI controller with n25q128, Peter A. G. Crosthwaite, 2012/08/05