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[Qemu-devel] [PATCH v2 04/11] PPC: Add some booke SPR defines
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PATCH v2 04/11] PPC: Add some booke SPR defines |
Date: |
Thu, 21 Jun 2012 15:33:53 +0200 |
The number of SPRs avaiable in different PowerPC chip is still increasing. Add
definitions for the MAS7_MAS3 SPR and all currently known bits in EPCR.
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/cpu.h | 22 ++++++++++++++++++++++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 67e699c..12200ab 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1395,6 +1395,7 @@ static inline void cpu_clone_regs(CPUPPCState *env,
target_ulong newsp)
#define SPR_BOOKE_TLB1PS (0x159)
#define SPR_BOOKE_TLB2PS (0x15A)
#define SPR_BOOKE_TLB3PS (0x15B)
+#define SPR_BOOKE_MAS7_MAS3 (0x174)
#define SPR_BOOKE_IVOR0 (0x190)
#define SPR_BOOKE_IVOR1 (0x191)
#define SPR_BOOKE_IVOR2 (0x192)
@@ -1762,6 +1763,27 @@ static inline void cpu_clone_regs(CPUPPCState *env,
target_ulong newsp)
#define SPR_604_HID15 (0x3FF)
#define SPR_E500_SVR (0x3FF)
+/* Disable MAS Interrupt Updates for Hypervisor */
+#define EPCR_DMIUH (1 << 22)
+/* Disable Guest TLB Management Instructions */
+#define EPCR_DGTMI (1 << 23)
+/* Guest Interrupt Computation Mode */
+#define EPCR_GICM (1 << 24)
+/* Interrupt Computation Mode */
+#define EPCR_ICM (1 << 25)
+/* Disable Embedded Hypervisor Debug */
+#define EPCR_DUVD (1 << 26)
+/* Instruction Storage Interrupt Directed to Guest State */
+#define EPCR_ISIGS (1 << 27)
+/* Data Storage Interrupt Directed to Guest State */
+#define EPCR_DSIGS (1 << 28)
+/* Instruction TLB Error Interrupt Directed to Guest State */
+#define EPCR_ITLBGS (1 << 29)
+/* Data TLB Error Interrupt Directed to Guest State */
+#define EPCR_DTLBGS (1 << 30)
+/* External Input Interrupt Directed to Guest State */
+#define EPCR_EXTGS (1 << 31)
+
/*****************************************************************************/
/* PowerPC Instructions types definitions */
enum {
--
1.6.0.2
- [Qemu-devel] [PATCH v2 00/11] PPC: e5500 emulation, Alexander Graf, 2012/06/21
- [Qemu-devel] [PATCH v2 10/11] PPC: BookE: Support 32 and 64 bit wide MAS2, Alexander Graf, 2012/06/21
- [Qemu-devel] [PATCH v2 07/11] PPC: BookE: Make ivpr selectable by CPU type, Alexander Graf, 2012/06/21
- [Qemu-devel] [PATCH v2 06/11] PPC: BookE: Implement EPR SPR, Alexander Graf, 2012/06/21
- [Qemu-devel] [PATCH v2 04/11] PPC: Add some booke SPR defines,
Alexander Graf <=
- [Qemu-devel] [PATCH v2 01/11] dt: make setprop argument static, Alexander Graf, 2012/06/21
- [Qemu-devel] [PATCH v2 05/11] PPC: Add support for MSR_CM, Alexander Graf, 2012/06/21
- [Qemu-devel] [PATCH v2 02/11] PPC: e500: allow users to set the /compatible property via -machine, Alexander Graf, 2012/06/21
- [Qemu-devel] [PATCH v2 11/11] PPC: BookE206: Bump MAS2 to 64bit, Alexander Graf, 2012/06/21
- [Qemu-devel] [PATCH v2 03/11] uImage: increase the gzip load size, Alexander Graf, 2012/06/21
- [Qemu-devel] [PATCH v2 09/11] PPC: Extract SPR dump generation into its own function, Alexander Graf, 2012/06/21
- [Qemu-devel] [PATCH v2 08/11] PPC: Add e5500 CPU target, Alexander Graf, 2012/06/21