[Qemu-devel] [PATCH v2 00/17] Qemu Openrisc support

[Jia Liu]

This is the Opencores Openrisc 1200 support for Qemu.
Full implementation of the system-model and linux-user-model support.

Openrisc 1200 is a Opencores Open Source CPU,
its Architecture Manual can be find at
http://opencores.org/svnget,or1k?file=/trunk/docs/openrisc_arch.pdf

---
Thank you all for your very helpful comments. If I missed something,
or made some wrong fix, please give me more comments,
I'm afraid I did not get all of your ideas, and made V2 not good enough.
---

Signed-off-by: Jia Liu <address@hidden>
---

Version History:

V2:
Addressed Malc, Weiren, Andreas and Blue's review comments:
- reimplement cpu QOM.

Addressed Andreas's review comments:
- reimplement machine.
- rewrite the Copyright Notice using better format.

Addressed Blue and Weiren's review comments:
- compiling with AREG0 and remove global env, no dyngen-exe longer.

Addressed Max, Blue and Weiren's review comments:
- handle div zero exception.
- handle illegal instruction.

Addressed Blue's review comments:
- separate do_interrupt into intrpt.c form intrpt_helper.c.
- add QEMU_NORETURN to raise_exception.
- reimplement float instrutions.
- fix type of linux syscall and termbits.
- reimplement sim board.
- use the LGPL web URL in Copyright Notice.
- reimplemt branch instructions.

- split taregt stubs, QOM and machine.

V1:
- add Qemu Openrisc support.
- well tested on x64 machine, and final tested x86 machine.

Jia Liu (17):
  Openrisc: add target stubs
  Openrisc: add cpu QOM implement
  Openrisc: add basic machine
  Openrisc: add MMU support
  Openrisc: add interrupt support
  Openrisc: add exception support
  Openrisc: add int instruction helpers
  Openrisc: add float instruction helpers
  Openrisc: add instruction translation routines
  Openrisc: add Programmable Interrupt Controller
  Openrisc: add a timer
  Openrisc: add a simulator board
  Openrisc: add system instruction helpers
  Openrisc: add gdb stub support
  Openrisc: add linux syscall, signal and termbits
  Openrisc: add linux user support
  Openrisc: add testcases

 Makefile.target                     |    8 +
 arch_init.c                         |    2 +
 arch_init.h                         |    1 +
 configure                           |   11 +-
 cpu-exec.c                          |   19 +
 default-configs/or32-linux-user.mak |    2 +
 default-configs/or32-softmmu.mak    |    6 +
 elf.h                               |    2 +
 gdbstub.c                           |   64 ++
 hw/openrisc_cpudev.h                |   29 +
 hw/openrisc_pic.c                   |   78 ++
 hw/openrisc_sim.c                   |  145 ++++
 hw/openrisc_timer.c                 |  153 ++++
 linux-user/elfload.c                |   41 +
 linux-user/main.c                   |  100 +++
 linux-user/openrisc/syscall.h       |   24 +
 linux-user/openrisc/syscall_nr.h    |  506 ++++++++++++
 linux-user/openrisc/target_signal.h |   26 +
 linux-user/openrisc/termbits.h      |  294 +++++++
 linux-user/signal.c                 |  229 ++++++
 linux-user/syscall.c                |    2 +-
 linux-user/syscall_defs.h           |   40 +-
 poison.h                            |    1 +
 target-openrisc/cpu.c               |  134 ++++
 target-openrisc/cpu.h               |  362 +++++++++
 target-openrisc/excp.c              |   27 +
 target-openrisc/excp.h              |   28 +
 target-openrisc/excp_helper.c       |   27 +
 target-openrisc/fpu_helper.c        |  275 +++++++
 target-openrisc/helper.c            |  101 +++
 target-openrisc/helper.h            |   73 ++
 target-openrisc/int_helper.c        |  155 ++++
 target-openrisc/intrpt.c            |   72 ++
 target-openrisc/intrpt_helper.c     |   52 ++
 target-openrisc/machine.c           |   51 ++
 target-openrisc/mmu.c               |  236 ++++++
 target-openrisc/mmu_helper.c        |   63 ++
 target-openrisc/sys_helper.c        |  226 ++++++
 target-openrisc/translate.c         | 1500 +++++++++++++++++++++++++++++++++++
 tests/tcg/openrisc/Makefile         |   73 ++
 tests/tcg/openrisc/test_add.c       |   34 +
 tests/tcg/openrisc/test_addc.c      |   37 +
 tests/tcg/openrisc/test_addi.c      |   31 +
 tests/tcg/openrisc/test_addic.c     |   32 +
 tests/tcg/openrisc/test_and_or.c    |   61 ++
 tests/tcg/openrisc/test_bf.c        |   46 ++
 tests/tcg/openrisc/test_bnf.c       |   50 ++
 tests/tcg/openrisc/test_div.c       |   32 +
 tests/tcg/openrisc/test_extx.c      |   71 ++
 tests/tcg/openrisc/test_fx.c        |   53 ++
 tests/tcg/openrisc/test_j.c         |   26 +
 tests/tcg/openrisc/test_jal.c       |   26 +
 tests/tcg/openrisc/test_lf_add.c    |   32 +
 tests/tcg/openrisc/test_lf_div.c    |   33 +
 tests/tcg/openrisc/test_lf_eqd.c    |   44 +
 tests/tcg/openrisc/test_lf_eqs.c    |   43 +
 tests/tcg/openrisc/test_lf_ged.c    |   45 ++
 tests/tcg/openrisc/test_lf_ges.c    |   45 ++
 tests/tcg/openrisc/test_lf_gtd.c    |   45 ++
 tests/tcg/openrisc/test_lf_gts.c    |   45 ++
 tests/tcg/openrisc/test_lf_led.c    |   43 +
 tests/tcg/openrisc/test_lf_les.c    |   45 ++
 tests/tcg/openrisc/test_lf_ltd.c    |   45 ++
 tests/tcg/openrisc/test_lf_lts.c    |   45 ++
 tests/tcg/openrisc/test_lf_mul.c    |   22 +
 tests/tcg/openrisc/test_lf_ned.c    |   46 ++
 tests/tcg/openrisc/test_lf_nes.c    |   46 ++
 tests/tcg/openrisc/test_lf_rem.c    |   31 +
 tests/tcg/openrisc/test_lf_sub.c    |   31 +
 tests/tcg/openrisc/test_logic.c     |  100 +++
 tests/tcg/openrisc/test_lx.c        |   78 ++
 tests/tcg/openrisc/test_movhi.c     |   30 +
 tests/tcg/openrisc/test_mul.c       |   47 ++
 tests/tcg/openrisc/test_sfeq.c      |   43 +
 tests/tcg/openrisc/test_sfeqi.c     |   39 +
 tests/tcg/openrisc/test_sfges.c     |   44 +
 tests/tcg/openrisc/test_sfgesi.c    |   40 +
 tests/tcg/openrisc/test_sfgeu.c     |   44 +
 tests/tcg/openrisc/test_sfgeui.c    |   41 +
 tests/tcg/openrisc/test_sfgts.c     |   45 ++
 tests/tcg/openrisc/test_sfgtsi.c    |   41 +
 tests/tcg/openrisc/test_sfgtu.c     |   43 +
 tests/tcg/openrisc/test_sfgtui.c    |   42 +
 tests/tcg/openrisc/test_sfles.c     |   26 +
 tests/tcg/openrisc/test_sflesi.c    |   39 +
 tests/tcg/openrisc/test_sfleu.c     |   43 +
 tests/tcg/openrisc/test_sfleui.c    |   39 +
 tests/tcg/openrisc/test_sflts.c     |   43 +
 tests/tcg/openrisc/test_sfltsi.c    |   38 +
 tests/tcg/openrisc/test_sfltu.c     |   41 +
 tests/tcg/openrisc/test_sfltui.c    |   39 +
 tests/tcg/openrisc/test_sfne.c      |   43 +
 tests/tcg/openrisc/test_sfnei.c     |   38 +
 93 files changed, 7483 insertions(+), 6 deletions(-)
 create mode 100644 default-configs/or32-linux-user.mak
 create mode 100644 default-configs/or32-softmmu.mak
 create mode 100644 hw/openrisc_cpudev.h
 create mode 100644 hw/openrisc_pic.c
 create mode 100644 hw/openrisc_sim.c
 create mode 100644 hw/openrisc_timer.c
 create mode 100644 linux-user/openrisc/syscall.h
 create mode 100644 linux-user/openrisc/syscall_nr.h
 create mode 100644 linux-user/openrisc/target_signal.h
 create mode 100644 linux-user/openrisc/termbits.h
 create mode 100644 target-openrisc/cpu.c
 create mode 100644 target-openrisc/cpu.h
 create mode 100644 target-openrisc/excp.c
 create mode 100644 target-openrisc/excp.h
 create mode 100644 target-openrisc/excp_helper.c
 create mode 100644 target-openrisc/fpu_helper.c
 create mode 100644 target-openrisc/helper.c
 create mode 100644 target-openrisc/helper.h
 create mode 100644 target-openrisc/int_helper.c
 create mode 100644 target-openrisc/intrpt.c
 create mode 100644 target-openrisc/intrpt_helper.c
 create mode 100644 target-openrisc/machine.c
 create mode 100644 target-openrisc/mmu.c
 create mode 100644 target-openrisc/mmu_helper.c
 create mode 100644 target-openrisc/sys_helper.c
 create mode 100644 target-openrisc/translate.c
 create mode 100644 tests/tcg/openrisc/Makefile
 create mode 100644 tests/tcg/openrisc/test_add.c
 create mode 100644 tests/tcg/openrisc/test_addc.c
 create mode 100644 tests/tcg/openrisc/test_addi.c
 create mode 100644 tests/tcg/openrisc/test_addic.c
 create mode 100644 tests/tcg/openrisc/test_and_or.c
 create mode 100644 tests/tcg/openrisc/test_bf.c
 create mode 100644 tests/tcg/openrisc/test_bnf.c
 create mode 100644 tests/tcg/openrisc/test_div.c
 create mode 100644 tests/tcg/openrisc/test_extx.c
 create mode 100644 tests/tcg/openrisc/test_fx.c
 create mode 100644 tests/tcg/openrisc/test_j.c
 create mode 100644 tests/tcg/openrisc/test_jal.c
 create mode 100644 tests/tcg/openrisc/test_lf_add.c
 create mode 100644 tests/tcg/openrisc/test_lf_div.c
 create mode 100644 tests/tcg/openrisc/test_lf_eqd.c
 create mode 100644 tests/tcg/openrisc/test_lf_eqs.c
 create mode 100644 tests/tcg/openrisc/test_lf_ged.c
 create mode 100644 tests/tcg/openrisc/test_lf_ges.c
 create mode 100644 tests/tcg/openrisc/test_lf_gtd.c
 create mode 100644 tests/tcg/openrisc/test_lf_gts.c
 create mode 100644 tests/tcg/openrisc/test_lf_led.c
 create mode 100644 tests/tcg/openrisc/test_lf_les.c
 create mode 100644 tests/tcg/openrisc/test_lf_ltd.c
 create mode 100644 tests/tcg/openrisc/test_lf_lts.c
 create mode 100644 tests/tcg/openrisc/test_lf_mul.c
 create mode 100644 tests/tcg/openrisc/test_lf_ned.c
 create mode 100644 tests/tcg/openrisc/test_lf_nes.c
 create mode 100644 tests/tcg/openrisc/test_lf_rem.c
 create mode 100644 tests/tcg/openrisc/test_lf_sub.c
 create mode 100644 tests/tcg/openrisc/test_logic.c
 create mode 100644 tests/tcg/openrisc/test_lx.c
 create mode 100644 tests/tcg/openrisc/test_movhi.c
 create mode 100644 tests/tcg/openrisc/test_mul.c
 create mode 100644 tests/tcg/openrisc/test_sfeq.c
 create mode 100644 tests/tcg/openrisc/test_sfeqi.c
 create mode 100644 tests/tcg/openrisc/test_sfges.c
 create mode 100644 tests/tcg/openrisc/test_sfgesi.c
 create mode 100644 tests/tcg/openrisc/test_sfgeu.c
 create mode 100644 tests/tcg/openrisc/test_sfgeui.c
 create mode 100644 tests/tcg/openrisc/test_sfgts.c
 create mode 100644 tests/tcg/openrisc/test_sfgtsi.c
 create mode 100644 tests/tcg/openrisc/test_sfgtu.c
 create mode 100644 tests/tcg/openrisc/test_sfgtui.c
 create mode 100644 tests/tcg/openrisc/test_sfles.c
 create mode 100644 tests/tcg/openrisc/test_sflesi.c
 create mode 100644 tests/tcg/openrisc/test_sfleu.c
 create mode 100644 tests/tcg/openrisc/test_sfleui.c
 create mode 100644 tests/tcg/openrisc/test_sflts.c
 create mode 100644 tests/tcg/openrisc/test_sfltsi.c
 create mode 100644 tests/tcg/openrisc/test_sfltu.c
 create mode 100644 tests/tcg/openrisc/test_sfltui.c
 create mode 100644 tests/tcg/openrisc/test_sfne.c
 create mode 100644 tests/tcg/openrisc/test_sfnei.c

-- 
1.7.9.5