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[Qemu-devel] [PATCH 06/14] tcg-sparc: Support GUEST_BASE.
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 06/14] tcg-sparc: Support GUEST_BASE. |
Date: |
Tue, 27 Mar 2012 17:32:15 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
configure | 2 ++
tcg/sparc/tcg-target.c | 26 +++++++++++++++++++++++---
tcg/sparc/tcg-target.h | 2 ++
3 files changed, 27 insertions(+), 3 deletions(-)
diff --git a/configure b/configure
index 7741ba9..a79a090 100755
--- a/configure
+++ b/configure
@@ -819,6 +819,7 @@ case "$cpu" in
if test "$solaris" = "no" ; then
QEMU_CFLAGS="-ffixed-g1 -ffixed-g6 $QEMU_CFLAGS"
fi
+ host_guest_base="yes"
;;
sparc64)
LDFLAGS="-m64 $LDFLAGS"
@@ -827,6 +828,7 @@ case "$cpu" in
if test "$solaris" != "no" ; then
QEMU_CFLAGS="-ffixed-g1 $QEMU_CFLAGS"
fi
+ host_guest_base="yes"
;;
s390)
QEMU_CFLAGS="-m31 -march=z990 $QEMU_CFLAGS"
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 5cea5a8..c014ce0 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -59,6 +59,12 @@ static const char * const
tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
};
#endif
+#ifdef CONFIG_USE_GUEST_BASE
+# define TCG_GUEST_BASE_REG TCG_REG_I3
+#else
+# define TCG_GUEST_BASE_REG TCG_REG_G0
+#endif
+
#ifdef CONFIG_TCG_PASS_AREG0
#define ARG_OFFSET 1
#else
@@ -689,6 +695,14 @@ static void tcg_target_qemu_prologue(TCGContext *s)
tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O6) |
INSN_IMM13(-(TCG_TARGET_STACK_MINFRAME +
CPU_TEMP_BUF_NLONGS * (int)sizeof(long))));
+
+#ifdef CONFIG_USE_GUEST_BASE
+ if (GUEST_BASE != 0) {
+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, GUEST_BASE);
+ tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
+ }
+#endif
+
tcg_out32(s, JMPL | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_I1) |
INSN_RS2(TCG_REG_G0));
tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_I0);
@@ -956,14 +970,18 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg
*args, int sizeop)
if (TCG_TARGET_REG_BITS == 32 && sizeop == 3) {
int reg64 = (datalo < 16 ? datalo : TCG_REG_O0);
- tcg_out_ldst_rr(s, reg64, addr_reg, TCG_REG_G0, qemu_ld_opc[sizeop]);
+ tcg_out_ldst_rr(s, reg64, addr_reg,
+ (GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_G0),
+ qemu_ld_opc[sizeop]);
tcg_out_arithi(s, datahi, reg64, 32, SHIFT_SRLX);
if (reg64 != datalo) {
tcg_out_mov(s, TCG_TYPE_I32, datalo, reg64);
}
} else {
- tcg_out_ldst_rr(s, datalo, addr_reg, TCG_REG_G0, qemu_ld_opc[sizeop]);
+ tcg_out_ldst_rr(s, datalo, addr_reg,
+ (GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_G0),
+ qemu_ld_opc[sizeop]);
}
#endif /* CONFIG_SOFTMMU */
}
@@ -1058,7 +1076,9 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg
*args, int sizeop)
tcg_out_arith(s, TCG_REG_G1, TCG_REG_G1, TCG_REG_O2, ARITH_OR);
datalo = TCG_REG_G1;
}
- tcg_out_ldst_rr(s, datalo, addr_reg, TCG_REG_G0, qemu_st_opc[sizeop]);
+ tcg_out_ldst_rr(s, datalo, addr_reg,
+ (GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_G0),
+ qemu_st_opc[sizeop]);
#endif /* CONFIG_SOFTMMU */
}
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index 56742bf..e69dfc8 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -126,6 +126,8 @@ typedef enum {
#define TCG_TARGET_HAS_deposit_i64 0
#endif
+#define TCG_TARGET_HAS_GUEST_BASE
+
/* Note: must be synced with dyngen-exec.h */
#ifdef CONFIG_SOLARIS
#define TCG_AREG0 TCG_REG_G2
--
1.7.7.6
- [Qemu-devel] [PATCH 00/14] tcg-sparc improvments, v2, Richard Henderson, 2012/03/27
- [Qemu-devel] [PATCH 01/14] tcg-sparc: Hack in qemu_ld/st64 for 32-bit., Richard Henderson, 2012/03/27
- [Qemu-devel] [PATCH 02/14] tcg-sparc: Fix ADDX opcode., Richard Henderson, 2012/03/27
- [Qemu-devel] [PATCH 03/14] tcg-sparc: Assume v9 cpu always, i.e. force v8plus in 32-bit mode., Richard Henderson, 2012/03/27
- [Qemu-devel] [PATCH 06/14] tcg-sparc: Support GUEST_BASE.,
Richard Henderson <=
- [Qemu-devel] [PATCH 04/14] tcg-sparc: Fix qemu_ld/st to handle 32-bit host., Richard Henderson, 2012/03/27
- [Qemu-devel] [PATCH 07/14] Avoid declaring the env variable at all if CONFIG_TCG_PASS_AREG0., Richard Henderson, 2012/03/27
- [Qemu-devel] [PATCH 09/14] tcg-sparc: Change AREG0 in generated code to %i0., Richard Henderson, 2012/03/27
- [Qemu-devel] [PATCH 05/14] tcg-sparc: Simplify qemu_ld/st direct memory paths., Richard Henderson, 2012/03/27
- [Qemu-devel] [PATCH 08/14] tcg-sparc: Do not use a global register for AREG0., Richard Henderson, 2012/03/27
- [Qemu-devel] [PATCH 10/14] tcg-sparc: Clean up cruft stemming from attempts to use global registers., Richard Henderson, 2012/03/27
- [Qemu-devel] [PATCH 11/14] tcg-sparc: Mask shift immediates to avoid illegal insns., Richard Henderson, 2012/03/27
- [Qemu-devel] [PATCH 14/14] tcg-sparc: Fix and enable direct TB chaining., Richard Henderson, 2012/03/27