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Re: [Qemu-devel] [PATCH v4 5/7] RTC:Add RTC update-ended interrupt suppo
From: |
Stefano Stabellini |
Subject: |
Re: [Qemu-devel] [PATCH v4 5/7] RTC:Add RTC update-ended interrupt support |
Date: |
Thu, 22 Mar 2012 10:29:03 +0000 |
User-agent: |
Alpine 2.00 (DEB 1167 2008-08-23) |
On Thu, 22 Mar 2012, Zhang, Yang Z wrote:
> > -----Original Message-----
> > From: Stefano Stabellini [mailto:address@hidden
> > Sent: Wednesday, March 21, 2012 2:04 AM
> >
> > On Mon, 19 Mar 2012, Zhang, Yang Z wrote:
> > > Use a timer to emulate update cycle. When update cycle ended and UIE is
> > setting, then raise an interrupt. The timer runs only when UF or AF is
> > cleared.
> >
> > The idea is that if the user requests the update-ended interrupt (UIE)
> > we setup a timer to inject it at the right time into the guest and
> > another timer to update the UIP bit, correct?
> No, the timer runs whenever the UF and AF is cleared, not only UIE or AIE is
> set.
>
> > But do we actually need the second timer? Why can't we just update the
> > UIP bit whenever the user tries to read reg A, as we do when UIE is not set?
> The purpose of using two timer is trying to keep the UF, AF and UIP
> synchronous. User can poll UIP to check UF and AF bit. If we use timer for
> UF/AF bit track and check UIP by another way, since the timer will be fired
> with delay, then the problem is encountered: the UIP is cleared, but due to
> the delay of timer, the UF/AF bit is not set. So we need to check them on a
> same level. Although we can update UF/AF when reading it, the logic is too
> complicated, especially for AF bit.
fair enough
Re: [Qemu-devel] [PATCH v4 5/7] RTC:Add RTC update-ended interrupt support, Zhang, Yang Z, 2012/03/21