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[Qemu-devel] [PATCH v9 6/6] arm: Remove incorrect comment in arm_timer
From: |
Mark Langsdorf |
Subject: |
[Qemu-devel] [PATCH v9 6/6] arm: Remove incorrect comment in arm_timer |
Date: |
Wed, 11 Jan 2012 10:31:30 -0600 |
The current comment says that the arm_timers are restricted to between
32 KHz and 1 MHz, but sp804 TRM does not specify those limits.
Signed-off-by: Mark Langsdorf <address@hidden>
Reviewed-by: Andreas Färber <address@hidden>
---
Changes from v7, v8
None
Changes from v2, v3, v4, v5, v6
Skipped
Changes from v1
Clarified the commit message
hw/arm_timer.c | 3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/hw/arm_timer.c b/hw/arm_timer.c
index 60e1c63..15d493f 100644
--- a/hw/arm_timer.c
+++ b/hw/arm_timer.c
@@ -272,11 +272,8 @@ static int sp804_init(SysBusDevice *dev)
qi = qemu_allocate_irqs(sp804_set_irq, s, 2);
sysbus_init_irq(dev, &s->irq);
- /* The timers are configurable between 32kHz and 1MHz
- * defaulting to 1MHz but overrideable as individual properties */
s->timer[0] = arm_timer_init(s->freq0);
s->timer[1] = arm_timer_init(s->freq1);
-
s->timer[0]->irq = qi[0];
s->timer[1]->irq = qi[1];
memory_region_init_io(&s->iomem, &sp804_ops, s, "sp804", 0x1000);
--
1.7.5.4
- [Qemu-devel] [PATCH v8 1/6] Add xgmac ethernet model, (continued)
- [Qemu-devel] [PATCH v8 5/6] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/11
- Re: [Qemu-devel] [PATCH v8 5/6] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/11
- [Qemu-devel] [PATCH v8 6/6] arm: Remove incorrect comment in arm_timer, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v8 2/6] arm: make the number of GIC interrupts configurable, Mark Langsdorf, 2012/01/11
- Re: [Qemu-devel] [PATCH v8 2/6] arm: make the number of GIC interrupts configurable, Andreas Färber, 2012/01/11
- Re: [Qemu-devel] [PATCH v8 2/6] arm: make the number of GIC interrupts configurable, Peter Maydell, 2012/01/11
[Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v9 6/6] arm: Remove incorrect comment in arm_timer,
Mark Langsdorf <=
- [Qemu-devel] [PATCH v9 3/6] ahci: add support for non-PCI based controllers, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v9 4/6] arm: Add dummy support for co-processor 15's secure config register, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/11
- Re: [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank, Mitsyanko Igor, 2012/01/12
- Re: [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank, Andreas Färber, 2012/01/12
- Re: [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank, Mitsyanko Igor, 2012/01/12
- Re: [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/12
Re: [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank, Mitsyanko Igor, 2012/01/12
Re: [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/12
[Qemu-devel] [PATCH v9 2/6] arm: make the number of GIC interrupts configurable, Mark Langsdorf, 2012/01/11