Re: [Qemu-devel] [PATCH] virtio-pci: Fix endianness of virtio config

[Alexander Graf]

On 10.01.2012, at 21:35, Andreas Färber wrote:

> Am 10.01.2012 21:30, schrieb Alexander Graf:
>> Maybe the RTAS callbacks really want you to return stuff in little endian?
> 
> IIRC all RTAS callbacks need to be in the same bitness and endianness
> (MSR LE+SB) as when instantiating RTAS from OF.

Sure, the question is how the PCI controller is wired up usually. Just because 
RTAS works in native endianness doesn't mean that endianness of the actual 
device access isn't defined differently.

Check out e500 for example:

    memory_region_init_io(&h->conf_mem, &pci_host_conf_be_ops, h,
                          "pci-conf-idx", 4);
    memory_region_init_io(&h->data_mem, &pci_host_data_le_ops, h,
                          "pci-conf-data", 4);

Here config space, so the address of the config field you're trying to access, 
is interpreted as big endian, while the actual data is transferred in little 
endian. Which actually is normal because config space is stored in little 
endian.

So mabye RTAS also defines config space data as being little endian?


Alex