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[Qemu-devel] [PATCH v5 08/11] hw/exynos4210.c: Boot secondary CPU.
From: |
Evgeny Voevodin |
Subject: |
[Qemu-devel] [PATCH v5 08/11] hw/exynos4210.c: Boot secondary CPU. |
Date: |
Fri, 23 Dec 2011 15:40:11 +0400 |
Signed-off-by: Evgeny Voevodin <address@hidden>
---
hw/exynos4210.c | 14 ++++++++++++++
hw/exynos4210.h | 7 ++++++-
hw/exynos4_boards.c | 9 +++++++++
3 files changed, 29 insertions(+), 1 deletions(-)
diff --git a/hw/exynos4210.c b/hw/exynos4210.c
index f958980..badeacf 100644
--- a/hw/exynos4210.c
+++ b/hw/exynos4210.c
@@ -283,6 +283,20 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR,
&s->dram0_mem);
+ /*
+ * Secondary CPU startup code will be placed here.
+ */
+ memory_region_init_ram(&s->hack_mem, NULL, "exynos4210.hack", 0x1000);
+ memory_region_add_subregion(system_mem, EXYNOS4210_SMP_BOOT_ADDR,
+ &s->hack_mem);
+
+ /*
+ * Hack: Map SECOND_CPU_BOOTREG, because it is in PMU USER5 register.
+ */
+ memory_region_init_ram(&s->bootreg_mem, NULL, "exynos4210.bootreg", 0x4);
+ memory_region_add_subregion(system_mem, EXYNOS4210_SECOND_CPU_BOOTREG,
+ &s->bootreg_mem);
+
/* PWM */
sysbus_create_varargs("exynos4210.pwm", EXYNOS4210_PWM_BASE_ADDR,
irq_table[exynos4210_get_irq(22, 0)],
diff --git a/hw/exynos4210.h b/hw/exynos4210.h
index b55d159..974d4c3 100644
--- a/hw/exynos4210.h
+++ b/hw/exynos4210.h
@@ -43,7 +43,11 @@
#define EXYNOS4210_IRAM_BASE_ADDR 0x02020000
#define EXYNOS4210_IRAM_SIZE 0x00020000 /* 128 KB */
+/* Secondary CPU startup code is in IROM memory */
+#define EXYNOS4210_SMP_BOOT_ADDR EXYNOS4210_IROM_BASE_ADDR
#define EXYNOS4210_BASE_BOOT_ADDR EXYNOS4210_DRAM0_BASE_ADDR
+/* Secondary CPU polling address to get loader start from */
+#define EXYNOS4210_SECOND_CPU_BOOTREG 0x10020814
#define EXYNOS4210_SMP_PRIVATE_BASE_ADDR 0x10500000
@@ -87,7 +91,8 @@ typedef struct Exynos4210State {
MemoryRegion irom_alias_mem;
MemoryRegion dram0_mem;
MemoryRegion dram1_mem;
-
+ MemoryRegion hack_mem;
+ MemoryRegion bootreg_mem;
} Exynos4210State;
Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
diff --git a/hw/exynos4_boards.c b/hw/exynos4_boards.c
index b710b06..5410a6f 100644
--- a/hw/exynos4_boards.c
+++ b/hw/exynos4_boards.c
@@ -52,6 +52,11 @@ static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] = {
[EXYNOS4_BOARD_SMDKC210] = 0xB16,
};
+static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = {
+ [EXYNOS4_BOARD_NURI] = EXYNOS4210_SECOND_CPU_BOOTREG,
+ [EXYNOS4_BOARD_SMDKC210] = EXYNOS4210_SECOND_CPU_BOOTREG,
+};
+
static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
[EXYNOS4_BOARD_NURI] = 0x40000000,
[EXYNOS4_BOARD_SMDKC210] = 0x40000000,
@@ -59,6 +64,7 @@ static unsigned long
exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
static struct arm_boot_info exynos4_board_binfo = {
.loader_start = EXYNOS4210_BASE_BOOT_ADDR,
+ .smp_loader_start = EXYNOS4210_SMP_BOOT_ADDR,
};
static Exynos4210State *exynos4_boards_init_common(
@@ -69,10 +75,13 @@ static Exynos4210State *exynos4_boards_init_common(
{
exynos4_board_binfo.ram_size = exynos4_board_ram_size[board_type];
exynos4_board_binfo.board_id = exynos4_board_id[board_type];
+ exynos4_board_binfo.smp_bootreg_addr =
+ exynos4_board_smp_bootreg_addr[board_type];
exynos4_board_binfo.nb_cpus = smp_cpus;
exynos4_board_binfo.kernel_filename = kernel_filename;
exynos4_board_binfo.initrd_filename = initrd_filename;
exynos4_board_binfo.kernel_cmdline = kernel_cmdline;
+ exynos4_board_binfo.smp_priv_base = EXYNOS4210_SMP_PRIVATE_BASE_ADDR;
PRINT_DEBUG("\n ram_size: %luMiB [0x%08lx]\n"
" kernel_filename: %s\n"
--
1.7.4.1
- [Qemu-devel] [PATCH v5 00/11] ARM: Samsung Exynos4210-based boards support., Evgeny Voevodin, 2011/12/23
- [Qemu-devel] [PATCH v5 03/11] hw/sysbus.h: Increase maximum number of device IRQs., Evgeny Voevodin, 2011/12/23
- [Qemu-devel] [PATCH v5 04/11] ARM: exynos4210: IRQ subsystem support., Evgeny Voevodin, 2011/12/23
- [Qemu-devel] [PATCH v5 08/11] hw/exynos4210.c: Boot secondary CPU.,
Evgeny Voevodin <=
- [Qemu-devel] [PATCH v5 06/11] hw/arm_boot.c: Extend secondary CPU bootloader., Evgeny Voevodin, 2011/12/23
- [Qemu-devel] [PATCH v5 05/11] ARM: exynos4210: PWM support., Evgeny Voevodin, 2011/12/23
- [Qemu-devel] [PATCH v5 09/11] hw/lan9118: Add basic 16-bit mode support., Evgeny Voevodin, 2011/12/23
- [Qemu-devel] [PATCH v5 10/11] hw/exynos4210.c: Add LAN support for SMDKC210., Evgeny Voevodin, 2011/12/23
- [Qemu-devel] [PATCH v5 07/11] ARM: exynos4210: MCT support., Evgeny Voevodin, 2011/12/23
- [Qemu-devel] [PATCH v5 11/11] Exynos4210: added display controller implementation, Evgeny Voevodin, 2011/12/23
- [Qemu-devel] [PATCH v5 01/11] ARM: Samsung exynos 4210-based boards emulation, Evgeny Voevodin, 2011/12/23
- [Qemu-devel] [PATCH v5 02/11] ARM: exynos4210: UART support, Evgeny Voevodin, 2011/12/23