[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH v3 13/14] ARM: exynos4210: added SD/MMC host con

From: Mitsyanko Igor
Subject: Re: [Qemu-devel] [PATCH v3 13/14] ARM: exynos4210: added SD/MMC host controller
Date: Tue, 13 Dec 2011 20:23:33 +0400
User-agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv: Gecko/20110922 Thunderbird/3.1.15

On 12/13/2011 06:56 PM, Peter Maydell wrote:
On 12 December 2011 06:43, Evgeny Voevodin<address@hidden>  wrote:
--- /dev/null
+++ b/hw/exynos4210_sdhc.c
@@ -0,0 +1,1666 @@
+ * Samsung exynos4210 SD/MMC host controller
+ * (SD host controller specification ver. 2.0 compliant)

Is there anything in this implementation which is exynos specific,
or is it purely an implementation of the standard?
We should separate out (and name appropriately) the code which
is implementing the SD host standard specification, and if necessary
add a thin wrapper for any exynos-specific bits.

-- PMM

Yes, exynos SD host controller has additional features controlled by exynos-specific bits in several specification-defined registers, and by registers CONTROL2 and CONTROL3 (which are not defined in SD host controller specification at all).

Are you suggesting to implement something like layered device, when device-specific SD host controller state structure includes generic host controller state? I thought about replacing exynos-specific registers in sd host controller state with two variables holding pointer to and size of these exynos-specific (or any other device specific) registers, plus add extra variable to hold host controller variant. This way it should be easier to account for influence of device sd host controller specific bits to default specification-defined registers behaviour.

reply via email to

[Prev in Thread] Current Thread [Next in Thread]