Re: [Qemu-devel] [PATCH] [ARM] Fix hw_error messages from arm_timer.c

[Peter Chubb]

Two of the calls to hw_error() in arm_timer.c contain the wrong function name.

As suggested by Andreas Färber, use the C99 standard __func__ macro to
get the correct name, instead of putting the name directly into the code.

Signed-off-by: Peter Chubb <address@hidden>

---
 hw/arm_timer.c |    8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Index: qemu-working/hw/arm_timer.c
===================================================================
--- qemu-working.orig/hw/arm_timer.c    2011-11-22 11:37:33.585457443 +1100
+++ qemu-working/hw/arm_timer.c 2011-11-22 13:10:25.510120391 +1100
@@ -54,21 +54,21 @@ static uint32_t arm_timer_read(void *opa
         return ptimer_get_count(s->timer);
     case 2: /* TimerControl */
         return s->control;
     case 4: /* TimerRIS */
         return s->int_level;
     case 5: /* TimerMIS */
         if ((s->control & TIMER_CTRL_IE) == 0)
             return 0;
         return s->int_level;
     default:
-        hw_error("arm_timer_read: Bad offset %x\n", (int)offset);
+        hw_error("%s: Bad offset %x\n", __func__, (int)offset);
         return 0;
     }
 }
 
 /* Reset the timer limit after settings have changed.  */
 static void arm_timer_recalibrate(arm_timer_state *s, int reload)
 {
     uint32_t limit;
 
     if ((s->control & (TIMER_CTRL_PERIODIC | TIMER_CTRL_ONESHOT)) == 0) {
@@ -121,21 +121,21 @@ static void arm_timer_write(void *opaque
         }
         break;
     case 3: /* TimerIntClr */
         s->int_level = 0;
         break;
     case 6: /* TimerBGLoad */
         s->limit = value;
         arm_timer_recalibrate(s, 0);
         break;
     default:
-        hw_error("arm_timer_write: Bad offset %x\n", (int)offset);
+        hw_error("%s: Bad offset %x\n", __func__, (int)offset);
     }
     arm_timer_update(s);
 }
 
 static void arm_timer_tick(void *opaque)
 {
     arm_timer_state *s = (arm_timer_state *)opaque;
     s->int_level = 1;
     arm_timer_update(s);
 }
@@ -263,35 +263,35 @@ typedef struct {
 
 static uint64_t icp_pit_read(void *opaque, target_phys_addr_t offset,
                              unsigned size)
 {
     icp_pit_state *s = (icp_pit_state *)opaque;
     int n;
 
     /* ??? Don't know the PrimeCell ID for this device.  */
     n = offset >> 8;
     if (n > 2) {
-        hw_error("sp804_read: Bad timer %d\n", n);
+        hw_error("%s: Bad timer %d\n", __func__, n);
     }
 
     return arm_timer_read(s->timer[n], offset & 0xff);
 }
 
 static void icp_pit_write(void *opaque, target_phys_addr_t offset,
                           uint64_t value, unsigned size)
 {
     icp_pit_state *s = (icp_pit_state *)opaque;
     int n;
 
     n = offset >> 8;
     if (n > 2) {
-        hw_error("sp804_write: Bad timer %d\n", n);
+        hw_error("%s: Bad timer %d\n", __func__, n);
     }
 
     arm_timer_write(s->timer[n], offset & 0xff, value);
 }
 
 static const MemoryRegionOps icp_pit_ops = {
     .read = icp_pit_read,
     .write = icp_pit_write,
     .endianness = DEVICE_NATIVE_ENDIAN,
 };


--
Dr Peter Chubb  http://www.gelato.unsw.edu.au  peterc AT gelato.unsw.edu.au
http://www.ertos.nicta.com.au           ERTOS within National ICT Australia