Re: [Qemu-devel] [PATCH] tcg: Optimize some forms of deposit.

[Blue Swirl]

On Mon, Oct 31, 2011 at 03:47, Alexander Graf <address@hidden> wrote:
>
> On 27.10.2011, at 23:15, Richard Henderson wrote:
>
>> If the deposit replaces the entire word, optimize to a move.
>>
>> If we're inserting to the top of the word, avoid the mask of arg2
>> as we'll be shifting out all of the garbage and shifting in zeros.
>>
>> If the host is 32-bit, reduce a 64-bit deposit to a 32-bit deposit
>> when possible.
>
> This patch breaks qemu-system-ppc64 on ppc32 hosts:
>
> IN:
> 0x00000000fff08618:  mfmsr   r0
> 0x00000000fff0861c:  ori     r0,r0,48
> 0x00000000fff08620:  mtmsr   r0
>
> OP:
>  ---- 0xfff08618
>  mov_i32 r0_0,msr_0
>  mov_i32 r0_1,msr_1
>
>  ---- 0xfff0861c
>  movi_i32 tmp0,$0x30
>  or_i32 r0_0,r0_0,tmp0
>
>  ---- 0xfff08620
>  movi_i32 nip_0,$0xfff08624
>  movi_i32 nip_1,$0x0
>  mov_i32 tmp1,r0_0
>  movi_i32 tmp0,$store_msr
>  call tmp0,$0x0,$0,tmp2,tmp1

tmp2 is not defined. Where does it come from?

The patch still looks fine to me. Maybe the problem is with the
optimizer, or a different bug is exposed by one of these. Can you try
if #undefining USE_TCG_OPTIMIZATIONS changes anything?

>  movi_i32 nip_0,$0xfff08624
>  movi_i32 nip_1,$0x0
>  exit_tb $0x0
>
> OP after liveness analysis:
>  ---- 0xfff08618
>  mov_i32 r0_0,msr_0
>  mov_i32 r0_1,msr_1
>
>  ---- 0xfff0861c
>  movi_i32 tmp0,$0x30
>  or_i32 r0_0,r0_0,tmp0
>
>  ---- 0xfff08620
>  movi_i32 nip_0,$0xfff08624
>  movi_i32 nip_1,$0x0
>  mov_i32 tmp1,r0_0
>  movi_i32 tmp0,$store_msr
>  call tmp0,$0x0,$0,tmp2,tmp1
>  movi_i32 nip_0,$0xfff08624
>  movi_i32 nip_1,$0x0
>  exit_tb $0x0
>  end
>
>
> address@hidden:/home/agraf/release/qemu> ./ppc64-softmmu/qemu-system-ppc64 
> -kernel /boot/vmlinux -initrd /boot/initrd -nographic -d 
> in_asm,cpu,int,op,op_opt,out_asm
> /home/agraf/release/qemu/tcg/tcg.c:1929: tcg fatal error
> Aborted
>
>
>
> Alex
>
>