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Re: [Qemu-devel] [PATCH 1/1] Introduce a new bus "ICC" to connect APIC
From: |
Jan Kiszka |
Subject: |
Re: [Qemu-devel] [PATCH 1/1] Introduce a new bus "ICC" to connect APIC |
Date: |
Sun, 23 Oct 2011 18:00:34 +0200 |
User-agent: |
Mozilla/5.0 (X11; U; Linux i686 (x86_64); de; rv:1.8.1.12) Gecko/20080226 SUSE/2.0.0.12-1.1 Thunderbird/2.0.0.12 Mnenhy/0.7.5.666 |
On 2011-10-23 17:54, Blue Swirl wrote:
> On Sun, Oct 23, 2011 at 15:45, Jan Kiszka <address@hidden> wrote:
>> On 2011-10-23 14:40, Blue Swirl wrote:
>>> I'm not sure that a full bus is needed for now, even if it could match
>>> real HW better, since the memory API already provides the separation
>>> needed. Perhaps this would be needed later to make IRQs per-CPU also,
>>> or to put IOAPIC also to the bus?
>>
>> The ICC interconnects LAPICs and IOAPICs.
>
> But not between CPU core and its LAPIC?
Nope, that link is core-internal and has nothing to do with the ICC. See
e.g. Figure 2-2 of Intel's "MultiProcessor Specification".
Jan
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Re: [Qemu-devel] [PATCH 1/1] Introduce a new bus "ICC" to connect APIC, Blue Swirl, 2011/10/23
Re: [Qemu-devel] [PATCH 1/1] Introduce a new bus "ICC" to connect APIC, liu ping fan, 2011/10/25