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Re: [Qemu-devel] [Qemu-ppc] [PATCH] pseries: Correct vmx/dfp handling in


From: Alexander Graf
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH] pseries: Correct vmx/dfp handling in both KVM and TCG cases
Date: Thu, 20 Oct 2011 19:40:00 -0700

On 20.10.2011, at 17:41, David Gibson <address@hidden> wrote:

> On Thu, Oct 20, 2011 at 10:12:51AM -0700, Alexander Graf wrote:
>> On 17.10.2011, at 21:15, David Gibson wrote:
> [snip]
>>> const ppc_def_t *kvmppc_host_cpu_def(void)
>>> {
>>>    uint32_t host_pvr = mfpvr();
>>>    const ppc_def_t *base_spec;
>>> +    ppc_def_t *spec;
>>> +    uint32_t vmx = kvmppc_get_vmx();
>>> +    uint32_t dfp = kvmppc_get_dfp();
>>> 
>>>    base_spec = ppc_find_by_pvr(host_pvr);
>>> 
>>> -    return base_spec;
>>> +    spec = g_malloc0(sizeof(*spec));
>>> +    memcpy(spec, base_spec, sizeof(*spec));
>>> +
>>> +    /* Now fix up the spec with information we can query from the host */
>>> +
>>> +    alter_insns(&spec->insns_flags, PPC_ALTIVEC, vmx > 0);
>>> +    alter_insns(&spec->insns_flags2, PPC2_VSX, vmx > 1);
>>> +    alter_insns(&spec->insns_flags2, PPC2_DFP, dfp);
>> 
>> The logic is reversed. We always want the CPU description to contain
>> all the feature bits that really describes what the CPU looks
>> like. Then we can mask it for KVM and TCG to make sure we only
>> expose to the guest what the host is actually capable of.
> 
> Well, this is executed only in the -cpu host case, and only modifies
> the special "host" copy of the cpu spec.  The reasoning is that
> querying the host directly is a _better_ source of definitive
> information about the cpu in this case, than what we think based on
> the PVR.  For example the host may have a CPU that is capable of VSX
> or DFP, but where it is disabled in the firmware for some reason.
> This would become even more important if we implement approximate PVR
> matching again for -cpu host (in a not so roken way this time, of
> course).
> 
>>> +
>>> +    return spec;
>>> }
>>> 
>>> bool kvm_arch_stop_on_emulation_error(CPUState *env)
>>> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
>>> index 7de097d..c954192 100644
>>> --- a/target-ppc/translate_init.c
>>> +++ b/target-ppc/translate_init.c
>>> @@ -34,22 +34,6 @@
>>> #define TODO_USER_ONLY 1
>>> #endif
>>> 
>>> -struct ppc_def_t {
>>> -    const char *name;
>>> -    uint32_t pvr;
>>> -    uint32_t svr;
>>> -    uint64_t insns_flags;
>>> -    uint64_t insns_flags2;
>>> -    uint64_t msr_mask;
>>> -    powerpc_mmu_t   mmu_model;
>>> -    powerpc_excp_t  excp_model;
>>> -    powerpc_input_t bus_model;
>>> -    uint32_t flags;
>>> -    int bfd_mach;
>>> -    void (*init_proc)(CPUPPCState *env);
>>> -    int  (*check_pow)(CPUPPCState *env);
>>> -};
>>> -
>>> /* For user-mode emulation, we don't emulate any IRQ controller */
>>> #if defined(CONFIG_USER_ONLY)
>>> #define PPC_IRQ_INIT_FN(name)                                               
>>>   \
>>> @@ -6535,6 +6519,8 @@ static void init_proc_970MP (CPUPPCState *env)
>>>                              PPC_64B | PPC_ALTIVEC |                        
>>>  \
>>>                              PPC_SEGMENT_64B | PPC_SLBI |                   
>>>  \
>>>                              PPC_POPCNTB | PPC_POPCNTWD)
>>> +/* FIXME: Should also have PPC2_VSX and PPC2_DFP, but we don't
>>> + * implement those in TCG yet */
>>> #define POWERPC_INSNS2_POWER7 (PPC_NONE)
>> 
>> So down here, we would have the flags set, but then mask them out in
>> the TCG case because our TCG backend doesn't support them yet.
> 
> So, I really don't follow what the logic you want is.  It sounds more
> like what I have already, so I'm not sure how -cpu host comes into
> this.

Well, I want something very simple, layered:

-cpu host only searches for pvr matches and selects a different CPU type based 
on this

We have 2 masks of available flags: TCG emulatable flags and KVM virtualizable 
flags. The KVM flags need to be generated dynamically, from the host dt for 
now. TCG flags are constant.

Then we always AND the inst feature bits with the mask. This tells every other 
layer what features are available. That way even running -cpu G5 on a p7 works 
properly by not exposing DFP for example.

Based on the inst feature bits we now expose features in the guest dt.


Simple, eh? :)

Alex

> 



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