[Qemu-devel] [PATCH v2 07/12] sun4u: improve bus implementation of EBus bridge

[Hervé Poussineau]

Signed-off-by: Hervé Poussineau <address@hidden>
---
 hw/sun4u.c |   23 +++++++++++++++++------
 1 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/hw/sun4u.c b/hw/sun4u.c
index facfae0..410d52b 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -93,6 +93,8 @@ struct hwdef {
 
 typedef struct EbusState {
     PCIDevice pci_dev;
+    ISABus bus;
+    qemu_irq *isa_irq;
     MemoryRegion bar0;
     MemoryRegion bar1;
 } EbusState;
@@ -536,20 +538,29 @@ static void dummy_isa_irq_handler(void *opaque, int n, 
int level)
 static void
 pci_ebus_init(PCIBus *bus, int devfn)
 {
-    qemu_irq *isa_irq;
-
     pci_create_simple(bus, devfn, "ebus");
-    isa_irq = qemu_allocate_irqs(dummy_isa_irq_handler, NULL, 16);
-    isa_bus_irqs(isa_irq);
 }
 
+static qemu_irq pci_ebus_get_irq(ISABus *bus, int isairq)
+{
+    EbusState *s = container_of(bus, EbusState, bus);
+    if (isairq < 0 || isairq >= 16) {
+        hw_error("isa irq %d invalid", isairq);
+    }
+    return s->isa_irq[isairq];
+}
+
+static ISABusOps pci_ebus_ops = {
+    .get_irq = pci_ebus_get_irq,
+};
+
 static int
 pci_ebus_init1(PCIDevice *pci_dev)
 {
     EbusState *s = DO_UPCAST(EbusState, pci_dev, pci_dev);
 
-    isa_bus_bridge_init(&pci_dev->qdev);
-
+    isa_bus_new(&s->bus, &pci_ebus_ops, &pci_dev->qdev);
+    s->isa_irq = qemu_allocate_irqs(dummy_isa_irq_handler, NULL, 16);
     pci_dev->config[0x04] = 0x06; // command = bus master, pci mem
     pci_dev->config[0x05] = 0x00;
     pci_dev->config[0x06] = 0xa0; // status = fast back-to-back, 66MHz, no 
error
-- 
1.7.5.4