Re: [Qemu-devel] sparc32_dma: correctly initialize ledma base address

[Blue Swirl]

On Sat, Aug 20, 2011 at 5:04 AM, Bob Breuer <address@hidden> wrote:
> Mark Cave-Ayland wrote:
>> On 15/08/11 16:38, Bob Breuer wrote:
>>
>>> Depends on the rom.  The SS-5 rom always sets it correctly, whereas the
>>> SS-20 rom only sets it when you do "boot net".  Also, this is just the
>>> top 8 bits of the address.  The DMA2 documentation[1] for E_BASE_ADDR
>>> states that these upper address bits default to 0xff, even though it
>>> seems to incorrectly define it as bits 7:0 in the register instead of
>>> 31:24.
>>
>> Nice one - looks like I missed this when reading the documentation. At
>> least the choice of default address now makes sense.
>
> It might also make sense to modify the dma address calculations to use
> only the top 8 bits from ledma.  Not sure if anything will care about
> that though.

But both ibiblio doc for MACIO and Sun4M System Architecture manual
specify low bits 7:0.

>>> If you follow Artyom's blog, at [2] it was assumed that the bogus dbri
>>> device was the culprit (which is also why I went down the path of
>>> implementing the dbri device), when in reality, the selftest failure
>>> was preventing "boot net" from running and fixing the ledma register
>>> settings.
>>
>> Okay - I think I see ;)  In that case, I'd say this patch should be
>> applied if Blue hasn't already done it (*sigh* I really miss the git web
>> interface on qemu.org).

I haven't applied the patches because OpenBIOS still can't boot due to
the SCSI commits and I'd like to get that resolved first. I think ESP
driver in OpenBIOS is buggy this time.

> http://repo.or.cz/w/qemu.git  might be the next best thing, not sure if
> there is a mirroring delay with it or not.

Right, the web interface situation annoys me too.