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[Qemu-devel] [PATCH 094/111] m68k: define floatx80_default_inf_high and
From: |
Bryce Lanham |
Subject: |
[Qemu-devel] [PATCH 094/111] m68k: define floatx80_default_inf_high and floatx80_default_inf_low |
Date: |
Wed, 17 Aug 2011 15:53:25 -0500 |
From: Laurent Vivier <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>
---
fpu/softfloat.c | 38 ++++++++++++++++++++++++++------------
fpu/softfloat.h | 8 ++++++++
2 files changed, 34 insertions(+), 12 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 7951a0e..dbce683 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -768,7 +768,9 @@ static floatx80
) {
return packFloatx80( zSign, 0x7FFE, ~ roundMask );
}
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( zSign,
+ floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
if ( zExp <= 0 ) {
isTiny =
@@ -1583,7 +1585,9 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM )
aSign = extractFloat32Sign( a );
if ( aExp == 0xFF ) {
if ( aSig ) return commonNaNToFloatx80( float32ToCommonNaN( a
STATUS_VAR ) STATUS_VAR );
- return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( aSign,
+ floatx80_default_inf_high,
+ floatx80_default_inf_low);
}
if ( aExp == 0 ) {
if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
@@ -2924,7 +2928,9 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM )
aSign = extractFloat64Sign( a );
if ( aExp == 0x7FF ) {
if ( aSig ) return commonNaNToFloatx80( float64ToCommonNaN( a
STATUS_VAR ) STATUS_VAR );
- return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( aSign,
+ floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
if ( aExp == 0 ) {
if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
@@ -3870,8 +3876,8 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM )
if ( shiftCount ) {
float_raise( float_flag_invalid STATUS_VAR);
if ( ! aSign
- || ( ( aExp == 0x7FFF )
- && ( aSig != LIT64( 0x8000000000000000 ) ) )
+ || ( ( aExp == floatx80_default_inf_high )
+ && ( aSig != floatx80_default_inf_low ) )
) {
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
@@ -4114,7 +4120,9 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b,
flag zSign STATUS_PARAM
else if ( expDiff < 0 ) {
if ( bExp == 0x7FFF ) {
if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( zSign,
+ floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
if ( aExp == 0 ) ++expDiff;
shift64ExtraRightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );
@@ -4191,7 +4199,8 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b,
flag zSign STATUS_PARAM
bExpBigger:
if ( bExp == 0x7FFF ) {
if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
- return packFloatx80( zSign ^ 1, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( zSign ^ 1, floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
if ( aExp == 0 ) ++expDiff;
shift128RightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );
@@ -4285,7 +4294,8 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b
STATUS_PARAM )
return propagateFloatx80NaN( a, b STATUS_VAR );
}
if ( ( bExp | bSig ) == 0 ) goto invalid;
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( zSign, floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
if ( bExp == 0x7FFF ) {
if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
@@ -4296,7 +4306,8 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b
STATUS_PARAM )
z.high = floatx80_default_nan_high;
return z;
}
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( zSign, floatx80_default_inf_high,
+ floatx80_default_inf_high );
}
if ( aExp == 0 ) {
if ( aSig == 0 ) return packFloatx80( zSign, 0, 0 );
@@ -4345,7 +4356,8 @@ floatx80 floatx80_div( floatx80 a, floatx80 b
STATUS_PARAM )
if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
goto invalid;
}
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( zSign, floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
if ( bExp == 0x7FFF ) {
if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
@@ -4361,7 +4373,8 @@ floatx80 floatx80_div( floatx80 a, floatx80 b
STATUS_PARAM )
return z;
}
float_raise( float_flag_divbyzero STATUS_VAR);
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( zSign, floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
}
@@ -5071,7 +5084,8 @@ floatx80 float128_to_floatx80( float128 a STATUS_PARAM )
if ( aSig0 | aSig1 ) {
return commonNaNToFloatx80( float128ToCommonNaN( a STATUS_VAR )
STATUS_VAR );
}
- return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( aSign, floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
if ( aExp == 0 ) {
if ( ( aSig0 | aSig1 ) == 0 ) return packFloatx80( aSign, 0, 0 );
diff --git a/fpu/softfloat.h b/fpu/softfloat.h
index 9ff6b4d..7a1fa7e 100644
--- a/fpu/softfloat.h
+++ b/fpu/softfloat.h
@@ -541,6 +541,14 @@ INLINE int floatx80_is_any_nan(floatx80 a)
*----------------------------------------------------------------------------*/
extern const floatx80 floatx80_default_nan;
+#if defined(TARGET_M68K)
+#define floatx80_default_inf_high 0x7FFF
+#define floatx80_default_inf_low LIT64( 0x0000000000000000 )
+#else
+#define floatx80_default_inf_high 0x7FFF
+#define floatx80_default_inf_low LIT64( 0x8000000000000000 )
+#endif
+
/*----------------------------------------------------------------------------
| Software IEC/IEEE quadruple-precision conversion routines.
*----------------------------------------------------------------------------*/
--
1.7.2.3
- [Qemu-devel] [PATCH 090/111] m68k: correctly define and manage NaN, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 091/111] m68k: don't call gdb_register_coprocessor() twice., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 092/111] m68k: gdb FP registers are 96 bits, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 093/111] m68k: add exg instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 094/111] m68k: define floatx80_default_inf_high and floatx80_default_inf_low,
Bryce Lanham <=
- [Qemu-devel] [PATCH 095/111] m68k: add bkpt instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 096/111] m68k: correctly convert floatx80<->long double, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 099/111] m68k: use logl() to compute ln_FP0(), Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 098/111] m68k: use exp2l() to compute exp2_FP0(), Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 097/111] m68k: use expl() to compute exp_FP0(), Bryce Lanham, 2011/08/17