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Re: [Qemu-devel] [PATCH 21/28] PPC: E500: Add PV spinning code
From: |
Scott Wood |
Subject: |
Re: [Qemu-devel] [PATCH 21/28] PPC: E500: Add PV spinning code |
Date: |
Mon, 25 Jul 2011 15:40:50 -0500 |
On Sat, 23 Jul 2011 12:50:05 +0200
Alexander Graf <address@hidden> wrote:
> +typedef struct spin_info {
> + uint64_t addr;
> + uint64_t r3;
> + uint32_t resv;
> + uint32_t pir;
> + uint64_t r6;
> +} __attribute__ ((packed)) SpinInfo;
Note that r6 isn't part of the ePAPR spin table -- I think it may have been
in an early draft and gotten into U-Boot that way. A future ePAPR could
assign another use to that position in the spin table.
Do we support any host ABIs strange enough that __attribute__((packed))
would be needed here?
> +static void mmubooke_create_initial_mapping(CPUState *env,
> + target_ulong va,
> + target_phys_addr_t pa,
> + target_phys_addr_t len)
> +{
> + ppcmas_tlb_t *tlb = booke206_get_tlbm(env, 1, 0, 0);
> + target_phys_addr_t size;
> +
> + size = (booke206_page_size_to_tlb(len) << MAS1_TSIZE_SHIFT);
> + tlb->mas1 = MAS1_VALID | size;
> + tlb->mas2 = va & TARGET_PAGE_MASK;
> + tlb->mas7_3 = pa & TARGET_PAGE_MASK;
> + tlb->mas7_3 |= MAS3_UR | MAS3_UW | MAS3_UX | MAS3_SR | MAS3_SW | MAS3_SX;
> +}
[snip]
> + mmubooke_create_initial_mapping(env, env->nip, env->nip, map_size);
ePAPR says:
The Secondary IMA (SIMA) mapping in the MMU shall map effective address 0
to the entry_addr field in the spin table, aligned down to the SIMA size.
Note that it's possible for the physical entry point to be > 4GiB on a
32-bit target.
Also, MAS2[M] should be set, even if it doesn't affect anything real under
qemu/kvm.
I know that U-Boot has the same behavior on both counts. U-Boot is wrong.
-Scott
- [Qemu-devel] [PATCH 06/28] PPC: MPIC: Remove read functionality for WO registers, (continued)
- [Qemu-devel] [PATCH 06/28] PPC: MPIC: Remove read functionality for WO registers, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 12/28] PPC: bamboo: Move host fdt copy to target, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 01/28] PPC: Move openpic to target specific code compilation, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 08/28] PPC: Bump MPIC up to 32 supported CPUs, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 14/28] PPC: E500: Use generic kvm function for freq, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 19/28] PPC: E500: Update freqs for all CPUs, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 09/28] PPC: E500: create multiple envs, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 13/28] PPC: KVM: Add generic function to read host clockfreq, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 26/28] MPC8544DS: Remove CPU nodes, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 21/28] PPC: E500: Add PV spinning code, Alexander Graf, 2011/07/23
- Re: [Qemu-devel] [PATCH 21/28] PPC: E500: Add PV spinning code,
Scott Wood <=
- [Qemu-devel] [PATCH 18/28] PPC: KVM: Add stubs for kvm helper functions, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 11/28] device tree: add nop_node, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 05/28] PPC: Set MPIC IDE for IPI to 0, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 28/28] PPC: E500: Bump CPU count to 15, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 25/28] device tree: give dt more size, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 03/28] PPC: Extend MPIC MMIO range, Alexander Graf, 2011/07/23