[Qemu-devel] [PATCH v5 10/10] trace: enable all events

[Lluís]

Given that all events with programmatically-controlled state are disabled by
default, we can delete the "disable" property from all events.

Signed-off-by: Lluís Vilanova <address@hidden>
---
 trace-events |  566 +++++++++++++++++++++++++++++-----------------------------
 1 files changed, 283 insertions(+), 283 deletions(-)

diff --git a/trace-events b/trace-events
index 7551105..66a2567 100644
--- a/trace-events
+++ b/trace-events
@@ -26,384 +26,384 @@
 # The <format-string> should be a sprintf()-compatible format string.
 
 # qemu-malloc.c
-disable qemu_malloc(size_t size, void *ptr) "size %zu ptr %p"
-disable qemu_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu 
newptr %p"
-disable qemu_free(void *ptr) "ptr %p"
+qemu_malloc(size_t size, void *ptr) "size %zu ptr %p"
+qemu_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
+qemu_free(void *ptr) "ptr %p"
 
 # osdep.c
-disable qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu 
size %zu ptr %p"
-disable qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p"
-disable qemu_vfree(void *ptr) "ptr %p"
+qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size 
%zu ptr %p"
+qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p"
+qemu_vfree(void *ptr) "ptr %p"
 
 # hw/virtio.c
-disable virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned 
int idx) "vq %p elem %p len %u idx %u"
-disable virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
-disable virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int 
out_num) "vq %p elem %p in_num %u out_num %u"
-disable virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
-disable virtio_irq(void *vq) "vq %p"
-disable virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
+virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) 
"vq %p elem %p len %u idx %u"
+virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
+virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) 
"vq %p elem %p in_num %u out_num %u"
+virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
+virtio_irq(void *vq) "vq %p"
+virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
 
 # block.c
-disable multiwrite_cb(void *mcb, int ret) "mcb %p ret %d"
-disable bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb 
%p num_callbacks %d num_reqs %d"
-disable bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p"
-disable bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d"
-disable bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p"
-disable bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void 
*opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
-disable bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void 
*opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
-disable bdrv_set_locked(void *bs, int locked) "bs %p locked %d"
+multiwrite_cb(void *mcb, int ret) "mcb %p ret %d"
+bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p 
num_callbacks %d num_reqs %d"
+bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p"
+bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d"
+bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p"
+bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs 
%p sector_num %"PRId64" nb_sectors %d opaque %p"
+bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) 
"bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
+bdrv_set_locked(void *bs, int locked) "bs %p locked %d"
 
 # hw/virtio-blk.c
-disable virtio_blk_req_complete(void *req, int status) "req %p status %d"
-disable virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
-disable virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) 
"req %p sector %"PRIu64" nsectors %zu"
+virtio_blk_req_complete(void *req, int status) "req %p status %d"
+virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
+virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p 
sector %"PRIu64" nsectors %zu"
 
 # posix-aio-compat.c
-disable paio_submit(void *acb, void *opaque, int64_t sector_num, int 
nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type 
%d"
-disable paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret 
%d"
-disable paio_cancel(void *acb, void *opaque) "acb %p opaque %p"
+paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int 
type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
+paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d"
+paio_cancel(void *acb, void *opaque) "acb %p opaque %p"
 
 # ioport.c
-disable cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u"
-disable cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u"
+cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u"
+cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u"
 
 # balloon.c
 # Since requests are raised via monitor, not many tracepoints are needed.
-disable balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
+balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
 
 # hw/apic.c
-disable apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode 
%d"
-disable apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t 
delivery_mode, uint8_t vector_num, uint8_t polarity, uint8_t trigger_mode) 
"dest %d dest_mode %d delivery_mode %d vector %d polarity %d trigger_mode %d"
-disable cpu_set_apic_base(uint64_t val) "%016"PRIx64""
-disable cpu_get_apic_base(uint64_t val) "%016"PRIx64""
-disable apic_mem_readl(uint64_t addr, uint32_t val)  "%"PRIx64" = %08x"
-disable apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
+apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
+apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, 
uint8_t vector_num, uint8_t polarity, uint8_t trigger_mode) "dest %d dest_mode 
%d delivery_mode %d vector %d polarity %d trigger_mode %d"
+cpu_set_apic_base(uint64_t val) "%016"PRIx64""
+cpu_get_apic_base(uint64_t val) "%016"PRIx64""
+apic_mem_readl(uint64_t addr, uint32_t val)  "%"PRIx64" = %08x"
+apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
 # coalescing
-disable apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
-disable apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing 
%d"
-disable apic_set_irq(int apic_irq_delivered) "coalescing %d"
+apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
+apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
+apic_set_irq(int apic_irq_delivered) "coalescing %d"
 
 # hw/cs4231.c
-disable cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 
0x%02x"
-disable cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
-disable cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write 
reg %d: 0x%08x -> 0x%08x"
-disable cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) 
"write dreg %d: 0x%02x -> 0x%02x"
+cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
+cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
+cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 
0x%08x -> 0x%08x"
+cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg 
%d: 0x%02x -> 0x%02x"
 
 # hw/eccmemctl.c
-disable ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
-disable ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
-disable ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
-disable ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
-disable ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
-disable ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
-disable ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
-disable ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
-disable ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
-disable ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
-disable ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
-disable ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
-disable ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
-disable ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
-disable ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
-disable ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
-disable ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic 
%"PRId64" = %02x"
-disable ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic 
%"PRId64"= %02x"
+ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
+ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
+ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
+ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
+ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
+ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
+ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
+ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
+ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
+ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
+ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
+ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
+ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
+ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
+ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
+ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
+ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 
%02x"
+ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 
%02x"
 
 # hw/lance.c
-disable lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
-disable lance_mem_writew(uint64_t addr, uint32_t val) 
"addr=%"PRIx64"val=0x%04x"
+lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
+lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
 
 # hw/slavio_intctl.c
-disable slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) 
"read cpu %d reg 0x%"PRIx64" = %x"
-disable slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) 
"write cpu %d reg 0x%"PRIx64" = %x"
-disable slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t 
intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
-disable slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t 
intreg_pending) "Set cpu %d irq mask %x, curmask %x"
-disable slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 
0x%"PRIx64" = %x"
-disable slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system 
reg 0x%"PRIx64" = %x"
-disable slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t 
intregm_disabled) "Enabled master irq mask %x, curmask %x"
-disable slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t 
intregm_disabled) "Disabled master irq mask %x, curmask %x"
-disable slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
-disable slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) 
"pending %x disabled %x"
-disable slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) 
"Set cpu %d irq %d -> pil %d level %d"
-disable slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer 
level %d"
+slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu 
%d reg 0x%"PRIx64" = %x"
+slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu 
%d reg 0x%"PRIx64" = %x"
+slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t 
intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
+slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t 
intreg_pending) "Set cpu %d irq mask %x, curmask %x"
+slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 
0x%"PRIx64" = %x"
+slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 
0x%"PRIx64" = %x"
+slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) 
"Enabled master irq mask %x, curmask %x"
+slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) 
"Disabled master irq mask %x, curmask %x"
+slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
+slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending 
%x disabled %x"
+slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu 
%d irq %d -> pil %d level %d"
+slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
 
 # hw/slavio_misc.c
-disable slavio_misc_update_irq_raise(void) "Raise IRQ"
-disable slavio_misc_update_irq_lower(void) "Lower IRQ"
-disable slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: 
%d, config: %d"
-disable slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
-disable slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
-disable slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
-disable slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
-disable slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
-disable slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
-disable slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
-disable slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
-disable slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
-disable slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
-disable apc_mem_writeb(uint32_t val) "Write power management %02x"
-disable apc_mem_readb(uint32_t ret) "Read power management %02x"
-disable slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
-disable slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
-disable slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
-disable slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
+slavio_misc_update_irq_raise(void) "Raise IRQ"
+slavio_misc_update_irq_lower(void) "Lower IRQ"
+slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, 
config: %d"
+slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
+slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
+slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
+slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
+slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
+slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
+slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
+slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
+slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
+slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
+apc_mem_writeb(uint32_t val) "Write power management %02x"
+apc_mem_readb(uint32_t ret) "Read power management %02x"
+slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
+slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
+slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
+slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
 
 # hw/slavio_timer.c
-disable slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t 
count) "limit %"PRIx64" count %x%08x"
-disable slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count 
%x%08x"
-disable slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address 
%"PRIx64""
-disable slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = 
%08x"
-disable slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" 
= %08x"
-disable slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t 
count) "processor %d user timer set to %016"PRIx64""
-disable slavio_timer_mem_writel_counter_invalid(void) "not user timer"
-disable slavio_timer_mem_writel_status_start(unsigned int timer_index) 
"processor %d user timer started"
-disable slavio_timer_mem_writel_status_stop(unsigned int timer_index) 
"processor %d user timer stopped"
-disable slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor 
%d changed from counter to user timer"
-disable slavio_timer_mem_writel_mode_counter(unsigned int timer_index) 
"processor %d changed from user timer to counter"
-disable slavio_timer_mem_writel_mode_invalid(void) "not system timer"
-disable slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address 
%"PRIx64""
+slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) 
"limit %"PRIx64" count %x%08x"
+slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
+slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64""
+slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
+slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
+slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) 
"processor %d user timer set to %016"PRIx64""
+slavio_timer_mem_writel_counter_invalid(void) "not user timer"
+slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d 
user timer started"
+slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d 
user timer stopped"
+slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d 
changed from counter to user timer"
+slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d 
changed from user timer to counter"
+slavio_timer_mem_writel_mode_invalid(void) "not system timer"
+slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address 
%"PRIx64""
 
 # hw/sparc32_dma.c
-disable ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64""
-disable ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64""
-disable sparc32_dma_set_irq_raise(void) "Raise IRQ"
-disable sparc32_dma_set_irq_lower(void) "Lower IRQ"
-disable espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
-disable espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
-disable sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg 
%"PRIx64": 0x%08x"
-disable sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) 
"write dmareg %"PRIx64": 0x%08x -> 0x%08x"
-disable sparc32_dma_enable_raise(void) "Raise DMA enable"
-disable sparc32_dma_enable_lower(void) "Lower DMA enable"
+ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64""
+ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64""
+sparc32_dma_set_irq_raise(void) "Raise IRQ"
+sparc32_dma_set_irq_lower(void) "Lower IRQ"
+espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
+espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
+sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 
0x%08x"
+sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write 
dmareg %"PRIx64": 0x%08x -> 0x%08x"
+sparc32_dma_enable_raise(void) "Raise DMA enable"
+sparc32_dma_enable_lower(void) "Lower DMA enable"
 
 # hw/sun4m.c
-disable sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
-disable sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
-disable sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
-disable sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
+sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
+sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
+sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
+sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
 
 # hw/sun4m_iommu.c
-disable sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read 
reg[%"PRIx64"] = %x"
-disable sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write 
reg[%"PRIx64"] = %x"
-disable sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64""
-disable sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
-disable sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
-disable sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) 
"get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
-disable sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) 
"xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
-disable sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64""
+sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
+sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
+sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64""
+sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
+sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
+sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get 
flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
+sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate 
dva %"PRIx64" => pa %"PRIx64" iopte = %x"
+sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64""
 
 # hw/usb-ehci.c
-disable usb_ehci_reset(void) "=== RESET ==="
-disable usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd 
mmio %04x [%s] = %x"
-disable usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr 
mmio %04x [%s] = %x"
-disable usb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, 
uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
-disable usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
-disable usb_ehci_state(const char *schedule, const char *state) "%s schedule 
%s"
-disable usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t next, uint32_t 
c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds 
%08x,%08x,%08x"
-disable usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, 
int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
-disable usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ 
%08x - c %d, h %d, dtc %d, i %d"
-disable usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t next, uint32_t 
altnext) "q %p - QTD @ %08x: next %08x altnext %08x"
-disable usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, 
int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d"
-disable usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int 
babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, 
xacterr %d"
-disable usb_ehci_itd(uint32_t addr, uint32_t next, uint32_t mplen, uint32_t 
mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult 
%d, ep %d, dev %d"
-disable usb_ehci_port_attach(uint32_t port, const char *device) "attach port 
#%d - %s"
-disable usb_ehci_port_detach(uint32_t port) "detach port #%d"
-disable usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
-disable usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, 
uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, 
len %d, bufpos %d"
-disable usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
+usb_ehci_reset(void) "=== RESET ==="
+usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio 
%04x [%s] = %x"
+usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio 
%04x [%s] = %x"
+usb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t 
old) "ch mmio %04x [%s] = %x (old: %x)"
+usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
+usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
+usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t next, uint32_t c_qtd, 
uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds 
%08x,%08x,%08x"
+usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int 
devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
+usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c 
%d, h %d, dtc %d, i %d"
+usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t next, uint32_t altnext) "q 
%p - QTD @ %08x: next %08x altnext %08x"
+usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) 
"QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d"
+usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, 
int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d"
+usb_ehci_itd(uint32_t addr, uint32_t next, uint32_t mplen, uint32_t mult, 
uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep 
%d, dev %d"
+usb_ehci_port_attach(uint32_t port, const char *device) "attach port #%d - %s"
+usb_ehci_port_detach(uint32_t port) "detach port #%d"
+usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
+usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t 
len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, 
bufpos %d"
+usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
 
 # hw/usb-desc.c
-disable usb_desc_device(int addr, int len, int ret) "dev %d query device, len 
%d, ret %d"
-disable usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query 
device qualifier, len %d, ret %d"
-disable usb_desc_config(int addr, int index, int len, int ret) "dev %d query 
config %d, len %d, ret %d"
-disable usb_desc_other_speed_config(int addr, int index, int len, int ret) 
"dev %d query config %d, len %d, ret %d"
-disable usb_desc_string(int addr, int index, int len, int ret) "dev %d query 
string %d, len %d, ret %d"
-disable usb_set_addr(int addr) "dev %d"
-disable usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret 
%d"
-disable usb_clear_device_feature(int addr, int feature, int ret) "dev %d, 
feature %d, ret %d"
-disable usb_set_device_feature(int addr, int feature, int ret) "dev %d, 
feature %d, ret %d"
+usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret 
%d"
+usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device 
qualifier, len %d, ret %d"
+usb_desc_config(int addr, int index, int len, int ret) "dev %d query config 
%d, len %d, ret %d"
+usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d 
query config %d, len %d, ret %d"
+usb_desc_string(int addr, int index, int len, int ret) "dev %d query string 
%d, len %d, ret %d"
+usb_set_addr(int addr) "dev %d"
+usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
+usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, 
ret %d"
+usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, 
ret %d"
 
 # hw/scsi-bus.c
-disable scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
-disable scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d 
tag %d len %d"
-disable scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag 
%d"
-disable scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag 
%d"
-disable scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int 
xfer) "target %d lun %d tag %d command %d dir %d length %d"
-disable scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t 
lba) "target %d lun %d tag %d command %d lba %"PRIu64""
-disable scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d 
lun %d tag %d command %d"
+scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
+scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d 
len %d"
+scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d"
+scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d"
+scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) 
"target %d lun %d tag %d command %d dir %d length %d"
+scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) 
"target %d lun %d tag %d command %d lba %"PRIu64""
+scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d 
tag %d command %d"
 
 # vl.c
-disable vm_state_notify(int running, int reason) "running %d reason %d"
+vm_state_notify(int running, int reason) "running %d reason %d"
 
 # block/qed-l2-cache.c
-disable qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p 
entry %p"
-disable qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d"
-disable qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, 
int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d"
+qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p"
+qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d"
+qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) 
"l2_cache %p entry %p offset %"PRIu64" ref %d"
 
 # block/qed-table.c
-disable qed_read_table(void *s, uint64_t offset, void *table) "s %p offset 
%"PRIu64" table %p"
-disable qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d"
-disable qed_write_table(void *s, uint64_t offset, void *table, unsigned int 
index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u"
-disable qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p 
table %p flush %d ret %d"
+qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" 
table %p"
+qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d"
+qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, 
unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u"
+qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p 
flush %d ret %d"
 
 # block/qed.c
-disable qed_need_check_timer_cb(void *s) "s %p"
-disable qed_start_need_check_timer(void *s) "s %p"
-disable qed_cancel_need_check_timer(void *s) "s %p"
-disable qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d"
-disable qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, 
void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d 
opaque %p is_write %d"
-disable qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p 
acb %p ret %d cur_pos %"PRIu64""
-disable qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t 
len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
-disable qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, 
size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
-disable qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, 
uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
-disable qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, 
uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
-disable qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, 
size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
+qed_need_check_timer_cb(void *s) "s %p"
+qed_start_need_check_timer(void *s) "s %p"
+qed_cancel_need_check_timer(void *s) "s %p"
+qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d"
+qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void 
*opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque 
%p is_write %d"
+qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p 
ret %d cur_pos %"PRIu64""
+qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s 
%p acb %p ret %d offset %"PRIu64" len %zu"
+qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) 
"s %p acb %p ret %d offset %"PRIu64" len %zu"
+qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t 
offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
+qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, 
uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
+qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) 
"s %p acb %p ret %d offset %"PRIu64" len %zu"
 
 # hw/grlib_gptimer.c
-disable grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x 
and run"
-disable grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer 
disable config 0x%x"
-disable grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 
0x%x"
-disable grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x 
freq: 0x%x"
-disable grlib_gptimer_hit(int id) "timer:%d HIT"
-disable grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d 
addr 0x%"PRIx64" 0x%x"
-disable grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d 
addr 0x%"PRIx64" 0x%x"
+grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
+grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 
0x%x"
+grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
+grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 
0x%x"
+grlib_gptimer_hit(int id) "timer:%d HIT"
+grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 
0x%"PRIx64" 0x%x"
+grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 
0x%"PRIx64" 0x%x"
 
 # hw/grlib_irqmp.c
-disable grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, 
uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x 
lvl0:0x%04x\n"
-disable grlib_irqmp_ack(int intno) "interrupt:%d"
-disable grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
-disable grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64""
-disable grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 
0x%"PRIx64" value 0x%x"
+grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t 
lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x 
lvl0:0x%04x\n"
+grlib_irqmp_ack(int intno) "interrupt:%d"
+grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
+grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64""
+grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" 
value 0x%x"
 
 # hw/grlib_apbuart.c
-disable grlib_apbuart_event(int event) "event:%d"
-disable grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 
0x%"PRIx64" value 0x%x"
+grlib_apbuart_event(int event) "event:%d"
+grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" 
value 0x%x"
 
 # hw/leon3.c
-disable leon3_set_irq(int intno) "Set CPU IRQ %d"
-disable leon3_reset_irq(int intno) "Reset CPU IRQ %d"
+leon3_set_irq(int intno) "Set CPU IRQ %d"
+leon3_reset_irq(int intno) "Reset CPU IRQ %d"
 
 # spice-qemu-char.c
-disable spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested 
%d"
-disable spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
-disable spice_vmc_register_interface(void *scd) "spice vmc registered 
interface %p"
-disable spice_vmc_unregister_interface(void *scd) "spice vmc unregistered 
interface %p"
+spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
+spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
+spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
+spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
 
 # hw/lm32_pic.c
-disable lm32_pic_raise_irq(void) "Raise CPU interrupt"
-disable lm32_pic_lower_irq(void) "Lower CPU interrupt"
-disable lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
-disable lm32_pic_set_im(uint32_t im) "im 0x%08x"
-disable lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
-disable lm32_pic_get_im(uint32_t im) "im 0x%08x"
-disable lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
+lm32_pic_raise_irq(void) "Raise CPU interrupt"
+lm32_pic_lower_irq(void) "Lower CPU interrupt"
+lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
+lm32_pic_set_im(uint32_t im) "im 0x%08x"
+lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
+lm32_pic_get_im(uint32_t im) "im 0x%08x"
+lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
 
 # hw/lm32_juart.c
-disable lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
-disable lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
-disable lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
-disable lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
+lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
+lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
+lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
+lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
 
 # hw/lm32_timer.c
-disable lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x 
value 0x%08x"
-disable lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x 
value 0x%08x"
-disable lm32_timer_hit(void) "timer hit"
-disable lm32_timer_irq_state(int level) "irq state %d"
+lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 
0x%08x"
+lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 
0x%08x"
+lm32_timer_hit(void) "timer hit"
+lm32_timer_irq_state(int level) "irq state %d"
 
 # hw/lm32_uart.c
-disable lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x 
value 0x%08x"
-disable lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x 
value 0x%08x"
-disable lm32_uart_irq_state(int level) "irq state %d"
+lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 
0x%08x"
+lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
+lm32_uart_irq_state(int level) "irq state %d"
 
 # hw/lm32_sys.c
-disable lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x 
value 0x%08x"
+lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
 
 # hw/milkymist-ac97.c
-disable milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x 
value %08x"
-disable milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x 
value %08x"
-disable milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
-disable milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
-disable milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
-disable milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
-disable milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d 
remaining %u"
-disable milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
-disable milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining 
%u"
-disable milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
+milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
+milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
+milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
+milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
+milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u"
+milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
+milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
+milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
 
 # hw/milkymist-hpdmc.c
-disable milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x 
value=%08x"
-disable milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x 
value=%08x"
+milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x 
value=%08x"
+milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x 
value=%08x"
 
 # hw/milkymist-memcard.c
-disable milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr 
%08x value %08x"
-disable milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr 
%08x value %08x"
+milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
 
 # hw/milkymist-minimac2.c
-disable milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr 
%08x value %08x"
-disable milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr 
%08x value %08x"
-disable milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t 
value) "phy_addr %02x addr %02x value %04x"
-disable milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t 
value) "phy_addr %02x addr %02x value %04x"
-disable milkymist_minimac2_tx_frame(uint32_t length) "length %u"
-disable milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p 
length %u"
-disable milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p"
-disable milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf 
%p length %d"
-disable milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
-disable milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
-disable milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
+milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x 
value %08x"
+milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) 
"phy_addr %02x addr %02x value %04x"
+milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) 
"phy_addr %02x addr %02x value %04x"
+milkymist_minimac2_tx_frame(uint32_t length) "length %u"
+milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length 
%u"
+milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p"
+milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p 
length %d"
+milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
+milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
+milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
 
 # hw/milkymist-pfpu.c
-disable milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x 
value %08x"
-disable milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x 
value %08x"
-disable milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 
%08x b %08x dma_ptr %08x"
-disable milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
+milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b 
%08x dma_ptr %08x"
+milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
 
 # hw/milkymist-softusb.c
-disable milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr 
%08x value %08x"
-disable milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr 
%08x value %08x"
-disable milkymist_softusb_mevt(uint8_t m) "m %d"
-disable milkymist_softusb_kevt(uint8_t m) "m %d"
-disable milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d 
dy %d dz %d bs %02x"
-disable milkymist_softusb_pulse_irq(void) "Pulse IRQ"
+milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_softusb_mevt(uint8_t m) "m %d"
+milkymist_softusb_kevt(uint8_t m) "m %d"
+milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz 
%d bs %02x"
+milkymist_softusb_pulse_irq(void) "Pulse IRQ"
 
 # hw/milkymist-sysctl.c
-disable milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x 
value %08x"
-disable milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr 
%08x value %08x"
-disable milkymist_sysctl_icap_write(uint32_t value) "value %08x"
-disable milkymist_sysctl_start_timer0(void) "Start timer0"
-disable milkymist_sysctl_stop_timer0(void) "Stop timer0"
-disable milkymist_sysctl_start_timer1(void) "Start timer1"
-disable milkymist_sysctl_stop_timer1(void) "Stop timer1"
-disable milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
-disable milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
+milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_sysctl_icap_write(uint32_t value) "value %08x"
+milkymist_sysctl_start_timer0(void) "Start timer0"
+milkymist_sysctl_stop_timer0(void) "Stop timer0"
+milkymist_sysctl_start_timer1(void) "Start timer1"
+milkymist_sysctl_stop_timer1(void) "Stop timer1"
+milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
+milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
 
 # hw/milkymist-tmu2.c
-disable milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x 
value %08x"
-disable milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x 
value %08x"
-disable milkymist_tmu2_start(void) "Start TMU"
-disable milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
+milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_tmu2_start(void) "Start TMU"
+milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
 
 # hw/milkymist-uart.c
-disable milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x 
value %08x"
-disable milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x 
value %08x"
-disable milkymist_uart_pulse_irq_rx(void) "Pulse IRQ RX"
-disable milkymist_uart_pulse_irq_tx(void) "Pulse IRQ TX"
+milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_uart_pulse_irq_rx(void) "Pulse IRQ RX"
+milkymist_uart_pulse_irq_tx(void) "Pulse IRQ TX"
 
 # hw/milkymist-vgafb.c
-disable milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x 
value %08x"
-disable milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x 
value %08x"
+milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
+milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value 
%08x"
 
 # xen-all.c
-disable xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: 
%#lx, size %#lx"
-disable xen_client_set_memory(uint64_t start_addr, unsigned long size, 
unsigned long phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, 
log_dirty %i"
+xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, 
size %#lx"
+xen_client_set_memory(uint64_t start_addr, unsigned long size, unsigned long 
phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, log_dirty %i"
 
 # xen-mapcache.c
-disable qemu_map_cache(uint64_t phys_addr) "want %#"PRIx64""
-disable qemu_remap_bucket(uint64_t index) "index %#"PRIx64""
-disable qemu_map_cache_return(void* ptr) "%p"
-disable xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size 
%#"PRIx64""
-disable xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx"
+qemu_map_cache(uint64_t phys_addr) "want %#"PRIx64""
+qemu_remap_bucket(uint64_t index) "index %#"PRIx64""
+qemu_map_cache_return(void* ptr) "%p"
+xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64""
+xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx"
 
 # exec.c
-disable qemu_put_ram_ptr(void* addr) "%p"
+qemu_put_ram_ptr(void* addr) "%p"
 
 # hw/xen_platform.c
-disable xen_platform_log(char *s) "xen platform: %s"
+xen_platform_log(char *s) "xen platform: %s"