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[Qemu-devel] [PATCH 2/3] ppc: booke206: use MAV=2.0 TSIZE definition, fi
From: |
Scott Wood |
Subject: |
[Qemu-devel] [PATCH 2/3] ppc: booke206: use MAV=2.0 TSIZE definition, fix 4G pages |
Date: |
Fri, 17 Jun 2011 15:39:32 -0500 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
This definition is backward compatible with MAV=1.0 as long as
the guest does not set reserved bits in MAS1/MAS4.
Also, fix the shift in booke206_tlb_to_page_size -- it's the base
that should be able to hold a 4G page size, not the shift count.
Signed-off-by: Scott Wood <address@hidden>
---
I ran into this when converting the info tlb patch to use the symbolic
MAS defines -- figured it would be better to add support for this element
of MAV=2.0 rather than remove it from "info tlb".
hw/ppce500_mpc8544ds.c | 2 +-
target-ppc/cpu.h | 4 ++--
target-ppc/helper.c | 5 +++--
3 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 3cdeb43..a5e9378 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -177,7 +177,7 @@ out:
/* Create -kernel TLB entries for BookE, linearly spanning 256MB. */
static inline target_phys_addr_t booke206_page_size_to_tlb(uint64_t size)
{
- return (ffs(size >> 10) - 1) >> 1;
+ return ffs(size >> 10) - 1;
}
static void mmubooke_create_initial_mapping(CPUState *env,
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 8191ed2..5d80b1b 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -654,8 +654,8 @@ enum {
#define MAS0_ATSEL_TLB 0
#define MAS0_ATSEL_LRAT MAS0_ATSEL
-#define MAS1_TSIZE_SHIFT 8
-#define MAS1_TSIZE_MASK (0xf << MAS1_TSIZE_SHIFT)
+#define MAS1_TSIZE_SHIFT 7
+#define MAS1_TSIZE_MASK (0x1f << MAS1_TSIZE_SHIFT)
#define MAS1_TS_SHIFT 12
#define MAS1_TS (1 << MAS1_TS_SHIFT)
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 4e9b98a..5d007c5 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -1278,7 +1278,7 @@ target_phys_addr_t booke206_tlb_to_page_size(CPUState
*env, ppcmas_tlb_t *tlb)
{
uint32_t tlbncfg;
int tlbn = booke206_tlbm_to_tlbn(env, tlb);
- target_phys_addr_t tlbm_size;
+ int tlbm_size;
tlbncfg = env->spr[SPR_BOOKE_TLB0CFG + tlbn];
@@ -1286,9 +1286,10 @@ target_phys_addr_t booke206_tlb_to_page_size(CPUState
*env, ppcmas_tlb_t *tlb)
tlbm_size = (tlb->mas1 & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT;
} else {
tlbm_size = (tlbncfg & TLBnCFG_MINSIZE) >> TLBnCFG_MINSIZE_SHIFT;
+ tlbm_size <<= 1;
}
- return (1 << (tlbm_size << 1)) << 10;
+ return 1024ULL << tlbm_size;
}
/* TLB check function for MAS based SoftTLBs */
--
1.7.4.1
- [Qemu-devel] [PATCH 0/3] ppc: booke206: KVM MMU API and info tlb, Scott Wood, 2011/06/17
- [Qemu-devel] [PATCH 1/3] kvm: ppc: booke206: use MMU API, Scott Wood, 2011/06/17
- Re: [Qemu-devel] [PATCH 1/3] kvm: ppc: booke206: use MMU API, Alexander Graf, 2011/06/17
- Re: [Qemu-devel] [PATCH 1/3] kvm: ppc: booke206: use MMU API, Jan Kiszka, 2011/06/20
- Re: [Qemu-devel] [PATCH 1/3] kvm: ppc: booke206: use MMU API, Avi Kivity, 2011/06/20
- Re: [Qemu-devel] [PATCH 1/3] kvm: ppc: booke206: use MMU API, Jan Kiszka, 2011/06/20
- Re: [Qemu-devel] [PATCH 1/3] kvm: ppc: booke206: use MMU API, Avi Kivity, 2011/06/20
[Qemu-devel] [PATCH 2/3] ppc: booke206: use MAV=2.0 TSIZE definition, fix 4G pages,
Scott Wood <=
[Qemu-devel] [PATCH 3/3] ppc: booke206: add "info tlb" support, Scott Wood, 2011/06/17