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[Qemu-devel] [RFC 03/10] parallel: Allow to reconfigure ISA I/O base
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [RFC 03/10] parallel: Allow to reconfigure ISA I/O base |
Date: |
Mon, 6 Jun 2011 18:20:52 +0200 |
Signed-off-by: Andreas Färber <address@hidden>
---
hw/isa.h | 3 ++
hw/parallel.c | 70 +++++++++++++++++++++++++++++++++++++++------------------
2 files changed, 51 insertions(+), 22 deletions(-)
diff --git a/hw/isa.h b/hw/isa.h
index 789d91c..2bd8c82 100644
--- a/hw/isa.h
+++ b/hw/isa.h
@@ -41,6 +41,9 @@ extern target_phys_addr_t isa_mem_base;
void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
+/* parallel.c */
+void parallel_isa_reconfigure_iobase(ISADevice *dev, uint32_t base);
+
/* dma.c */
int DMA_get_channel_mode (int nchan);
int DMA_read_memory (int nchan, void *buf, int pos, int size);
diff --git a/hw/parallel.c b/hw/parallel.c
index cc853a5..5cb3856 100644
--- a/hw/parallel.c
+++ b/hw/parallel.c
@@ -446,6 +446,53 @@ static void parallel_reset(void *opaque)
s->last_read_offset = ~0U;
}
+static void parallel_isa_init_iobase(ISAParallelState *isa)
+{
+ ISADevice *dev = &isa->dev;
+ ParallelState *s = &isa->state;
+ int base;
+
+ base = isa->iobase;
+ if (s->hw_driver) {
+ register_ioport_write(base, 8, 1, parallel_ioport_write_hw, s);
+ register_ioport_read(base, 8, 1, parallel_ioport_read_hw, s);
+ isa_init_ioport_range(dev, base, 8);
+
+ register_ioport_write(base + 4, 1, 2,
parallel_ioport_eppdata_write_hw2, s);
+ register_ioport_read(base + 4, 1, 2, parallel_ioport_eppdata_read_hw2,
s);
+ register_ioport_write(base + 4, 1, 4,
parallel_ioport_eppdata_write_hw4, s);
+ register_ioport_read(base + 4, 1, 4, parallel_ioport_eppdata_read_hw4,
s);
+ isa_init_ioport(dev, base + 4);
+ register_ioport_write(base + 0x400, 8, 1, parallel_ioport_ecp_write,
s);
+ register_ioport_read(base + 0x400, 8, 1, parallel_ioport_ecp_read, s);
+ isa_init_ioport_range(dev, base + 0x400, 8);
+ } else {
+ register_ioport_write(base, 8, 1, parallel_ioport_write_sw, s);
+ register_ioport_read(base, 8, 1, parallel_ioport_read_sw, s);
+ isa_init_ioport_range(dev, base, 8);
+ }
+}
+
+void parallel_isa_reconfigure_iobase(ISADevice *dev, uint32_t base)
+{
+ ISAParallelState *isa = DO_UPCAST(ISAParallelState, dev, dev);
+ ParallelState *s = &isa->state;
+
+ if (base != isa->iobase) {
+ isa_discard_ioport_range(dev, base, 8);
+ isa_unassign_ioport(base, 8);
+ if (s->hw_driver) {
+ isa_discard_ioport_range(dev, base + 4, 1);
+ isa_unassign_ioport(base + 4, 1);
+ isa_discard_ioport_range(dev, base + 0x400, 8);
+ isa_unassign_ioport(base + 0x400, 8);
+ }
+
+ isa->iobase = base;
+ parallel_isa_init_iobase(isa);
+ }
+}
+
static const int isa_parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
static int parallel_isa_initfn(ISADevice *dev)
@@ -453,7 +500,6 @@ static int parallel_isa_initfn(ISADevice *dev)
static int index;
ISAParallelState *isa = DO_UPCAST(ISAParallelState, dev, dev);
ParallelState *s = &isa->state;
- int base;
uint8_t dummy;
if (!s->chr) {
@@ -469,7 +515,6 @@ static int parallel_isa_initfn(ISADevice *dev)
isa->iobase = isa_parallel_io[isa->index];
index++;
- base = isa->iobase;
isa_init_irq(dev, &s->irq, isa->isairq);
qemu_register_reset(parallel_reset, s);
@@ -477,26 +522,7 @@ static int parallel_isa_initfn(ISADevice *dev)
s->hw_driver = 1;
s->status = dummy;
}
-
- if (s->hw_driver) {
- register_ioport_write(base, 8, 1, parallel_ioport_write_hw, s);
- register_ioport_read(base, 8, 1, parallel_ioport_read_hw, s);
- isa_init_ioport_range(dev, base, 8);
-
- register_ioport_write(base+4, 1, 2, parallel_ioport_eppdata_write_hw2,
s);
- register_ioport_read(base+4, 1, 2, parallel_ioport_eppdata_read_hw2,
s);
- register_ioport_write(base+4, 1, 4, parallel_ioport_eppdata_write_hw4,
s);
- register_ioport_read(base+4, 1, 4, parallel_ioport_eppdata_read_hw4,
s);
- isa_init_ioport(dev, base+4);
- register_ioport_write(base+0x400, 8, 1, parallel_ioport_ecp_write, s);
- register_ioport_read(base+0x400, 8, 1, parallel_ioport_ecp_read, s);
- isa_init_ioport_range(dev, base+0x400, 8);
- }
- else {
- register_ioport_write(base, 8, 1, parallel_ioport_write_sw, s);
- register_ioport_read(base, 8, 1, parallel_ioport_read_sw, s);
- isa_init_ioport_range(dev, base, 8);
- }
+ parallel_isa_init_iobase(isa);
return 0;
}
--
1.7.5.3
- [Qemu-devel] [RFC 00/10] ISA reconfigurability, Andreas Färber, 2011/06/06
- [Qemu-devel] [RFC 01/10] isa: Allow to un-assign I/O ports, Andreas Färber, 2011/06/06
- [Qemu-devel] [RFC 02/10] isa: Allow to un-associate an IRQ, Andreas Färber, 2011/06/06
- [Qemu-devel] [RFC 03/10] parallel: Allow to reconfigure ISA I/O base,
Andreas Färber <=
- [Qemu-devel] [RFC 04/10] parallel: Allow to reconfigure ISA IRQ, Andreas Färber, 2011/06/06
- [Qemu-devel] [RFC 05/10] serial: Allow to reconfigure ISA I/O base, Andreas Färber, 2011/06/06
- [Qemu-devel] [RFC 06/10] serial: Allow to reconfigure ISA IRQ, Andreas Färber, 2011/06/06
- [Qemu-devel] [PATCH v2 07/10] fdc: Parametrize ISA base, IRQ and DMA, Andreas Färber, 2011/06/06
- [Qemu-devel] [RFC 08/10] fdc: Allow to reconfigure ISA I/O base, Andreas Färber, 2011/06/06
- [Qemu-devel] [RFC 09/10] ide: Allow to reconfigure ISA I/O base, Andreas Färber, 2011/06/06
- [Qemu-devel] [RFC 10/10] prep: Add pc87312 Super I/O emulation, Andreas Färber, 2011/06/06
- Re: [Qemu-devel] [RFC 05/10] serial: Allow to reconfigure ISA I/O base, Richard Henderson, 2011/06/06
- Re: [Qemu-devel] [RFC 05/10] serial: Allow to reconfigure ISA I/O base, Andreas Färber, 2011/06/06
Re: [Qemu-devel] [RFC 00/10] ISA reconfigurability, Gerd Hoffmann, 2011/06/07