From a229fcde2b3ac7e665995de7c54d42b1f54eec5e Mon Sep 17 00:00:00 2001 Message-Id: In-Reply-To: References: From: Blue Swirl Date: Sat, 14 May 2011 07:09:40 +0000 Subject: [PATCH 09/11] Don't compile legacy qemu_ld/st functions if target doesn't need them WIP Signed-off-by: Blue Swirl --- tcg/i386/tcg-target.c | 39 ++++++++++++++++++++++----------------- 1 files changed, 22 insertions(+), 17 deletions(-) diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index 0e168ea..8fc80af 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -999,7 +999,8 @@ static void *qemu_st_helpers[4] = { static inline void tcg_out_tlb_load(TCGContext *s, int addrlo_idx, int mem_index, int s_bits, const TCGArg *args, - uint8_t **label_ptr, int which) + uint8_t **label_ptr, int which, + int r_cpustate) { const int addrlo = args[addrlo_idx]; const int r0 = tcg_target_call_iarg_regs[0]; @@ -1023,7 +1024,7 @@ static inline void tcg_out_tlb_load(TCGContext *s, int addrlo_idx, tgen_arithi(s, ARITH_AND + rexw, r1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS, 0); - tcg_out_modrm_sib_offset(s, OPC_LEA + P_REXW, r1, TCG_AREG0, r1, 0, + tcg_out_modrm_sib_offset(s, OPC_LEA + P_REXW, r1, r_cpustate, r1, 0, offsetof(CPUState, tlb_table[mem_index][0]) + which); @@ -1136,7 +1137,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, int datalo, int datahi, EAX. It will be useful once fixed registers globals are less common. */ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, - int opc) + int opc, int r_cpustate) { int data_reg, data_reg2 = 0; int addrlo_idx; @@ -1157,7 +1158,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, s_bits = opc & 3; tcg_out_tlb_load(s, addrlo_idx, mem_index, s_bits, args, - label_ptr, offsetof(CPUTLBEntry, addr_read)); + label_ptr, offsetof(CPUTLBEntry, addr_read), r_cpustate); /* TLB Hit. */ tcg_out_qemu_ld_direct(s, data_reg, data_reg2, @@ -1310,7 +1311,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, int datalo, int datahi, } static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, - int opc) + int opc, int r_cpustate) { int data_reg, data_reg2 = 0; int addrlo_idx; @@ -1332,7 +1333,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, s_bits = opc; tcg_out_tlb_load(s, addrlo_idx, mem_index, s_bits, args, - label_ptr, offsetof(CPUTLBEntry, addr_write)); + label_ptr, offsetof(CPUTLBEntry, addr_write), r_cpustate); /* TLB Hit. */ tcg_out_qemu_st_direct(s, data_reg, data_reg2, @@ -1639,40 +1640,42 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_ext16u(s, args[0], args[1]); break; +#ifdef CONFIG_TARGET_NEEDS_AREG0 case INDEX_op_qemu_ld8u: - tcg_out_qemu_ld(s, args, 0); + tcg_out_qemu_ld(s, args, 0, TCG_AREG0); break; case INDEX_op_qemu_ld8s: - tcg_out_qemu_ld(s, args, 0 | 4); + tcg_out_qemu_ld(s, args, 0 | 4, TCG_AREG0); break; case INDEX_op_qemu_ld16u: - tcg_out_qemu_ld(s, args, 1); + tcg_out_qemu_ld(s, args, 1, TCG_AREG0); break; case INDEX_op_qemu_ld16s: - tcg_out_qemu_ld(s, args, 1 | 4); + tcg_out_qemu_ld(s, args, 1 | 4, TCG_AREG0); break; #if TCG_TARGET_REG_BITS == 64 case INDEX_op_qemu_ld32u: #endif case INDEX_op_qemu_ld32: - tcg_out_qemu_ld(s, args, 2); + tcg_out_qemu_ld(s, args, 2, TCG_AREG0); break; case INDEX_op_qemu_ld64: - tcg_out_qemu_ld(s, args, 3); + tcg_out_qemu_ld(s, args, 3, TCG_AREG0); break; case INDEX_op_qemu_st8: - tcg_out_qemu_st(s, args, 0); + tcg_out_qemu_st(s, args, 0, TCG_AREG0); break; case INDEX_op_qemu_st16: - tcg_out_qemu_st(s, args, 1); + tcg_out_qemu_st(s, args, 1, TCG_AREG0); break; case INDEX_op_qemu_st32: - tcg_out_qemu_st(s, args, 2); + tcg_out_qemu_st(s, args, 2, TCG_AREG0); break; case INDEX_op_qemu_st64: - tcg_out_qemu_st(s, args, 3); + tcg_out_qemu_st(s, args, 3, TCG_AREG0); break; +#endif #if TCG_TARGET_REG_BITS == 32 case INDEX_op_brcond2_i32: @@ -1721,9 +1724,11 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_st_i64: tcg_out_st(s, TCG_TYPE_I64, args[0], args[1], args[2]); break; +#ifdef CONFIG_TARGET_NEEDS_AREG0 case INDEX_op_qemu_ld32s: - tcg_out_qemu_ld(s, args, 2 | 4); + tcg_out_qemu_ld(s, args, 2 | 4, TCG_AREG0); break; +#endif case INDEX_op_brcond_i64: tcg_out_brcond64(s, args[2], args[0], args[1], const_args[1], -- 1.7.2.5