From f3d46a50a0cd2abcda4a71f30e2a7602937dd150 Mon Sep 17 00:00:00 2001 Message-Id: In-Reply-To: References: From: Blue Swirl Date: Sat, 21 May 2011 07:10:23 +0000 Subject: [PATCH 8/9] Move cpu_has_work and cpu_pc_from_tb to cpu.h Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This is needed by later patches. Signed-off-by: Blue Swirl --- exec-all.h | 1 + target-alpha/cpu.h | 12 +++++++++++ target-alpha/exec.h | 10 --------- target-arm/cpu.h | 13 ++++++++++++ target-arm/exec.h | 12 ----------- target-cris/cpu.h | 11 ++++++++++ target-cris/exec.h | 11 ---------- target-i386/cpu.h | 47 ++++++++++++++++++++++++++++++++++++++++++++++ target-i386/exec.h | 46 --------------------------------------------- target-lm32/cpu.h | 13 ++++++++++++ target-lm32/exec.h | 11 ---------- target-m68k/cpu.h | 12 +++++++++++ target-m68k/exec.h | 11 ---------- target-microblaze/cpu.h | 13 ++++++++++++ target-microblaze/exec.h | 11 ---------- target-mips/cpu.h | 24 +++++++++++++++++++++++ target-mips/exec.h | 22 --------------------- target-ppc/cpu.h | 12 +++++++++++ target-ppc/exec.h | 11 ---------- target-sh4/cpu.h | 13 ++++++++++++ target-sh4/exec.h | 11 ---------- target-sparc/cpu.h | 14 +++++++++++++ target-sparc/exec.h | 14 ------------- target-unicore32/cpu.h | 6 +++++ target-unicore32/exec.h | 6 ----- xen-mapcache-stub.c | 1 + 26 files changed, 192 insertions(+), 176 deletions(-) diff --git a/exec-all.h b/exec-all.h index 1862428..e9533f3 100644 --- a/exec-all.h +++ b/exec-all.h @@ -40,6 +40,7 @@ typedef ram_addr_t tb_page_addr_t; #define DISAS_UPDATE 2 /* cpu state was modified dynamically */ #define DISAS_TB_JUMP 3 /* only pc was modified statically */ +struct TranslationBlock; typedef struct TranslationBlock TranslationBlock; /* XXX: make safe guess about sizes */ diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index 686fb4a..359b2b6 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -535,4 +535,16 @@ static inline void cpu_set_tls(CPUState *env, target_ulong newtls) } #endif +static inline int cpu_has_work(CPUState *env) +{ + return env->interrupt_request & CPU_INTERRUPT_HARD; +} + +#include "exec-all.h" + +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +{ + env->pc = tb->pc; +} + #endif /* !defined (__CPU_ALPHA_H__) */ diff --git a/target-alpha/exec.h b/target-alpha/exec.h index 26c3a3a..f508996 100644 --- a/target-alpha/exec.h +++ b/target-alpha/exec.h @@ -37,14 +37,4 @@ register struct CPUAlphaState *env asm(AREG0); #include "softmmu_exec.h" #endif /* !defined(CONFIG_USER_ONLY) */ -static inline int cpu_has_work(CPUState *env) -{ - return env->interrupt_request & CPU_INTERRUPT_HARD; -} - -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) -{ - env->pc = tb->pc; -} - #endif /* !defined (__ALPHA_EXEC_H__) */ diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 01f5b57..bb54363 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -512,4 +512,17 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, } } +static inline int cpu_has_work(CPUState *env) +{ + return env->interrupt_request & + (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB); +} + +#include "exec-all.h" + +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +{ + env->regs[15] = tb->pc; +} + #endif diff --git a/target-arm/exec.h b/target-arm/exec.h index ef497d8..68d6fb9 100644 --- a/target-arm/exec.h +++ b/target-arm/exec.h @@ -26,20 +26,8 @@ register struct CPUARMState *env asm(AREG0); #include "cpu.h" #include "exec-all.h" -static inline int cpu_has_work(CPUState *env) -{ - return env->interrupt_request & - (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB); -} - #if !defined(CONFIG_USER_ONLY) #include "softmmu_exec.h" #endif void raise_exception(int); - -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) -{ - env->regs[15] = tb->pc; -} - diff --git a/target-cris/cpu.h b/target-cris/cpu.h index 2bc35e4..adbc38b 100644 --- a/target-cris/cpu.h +++ b/target-cris/cpu.h @@ -268,4 +268,15 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, #define cpu_list cris_cpu_list void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf); +static inline int cpu_has_work(CPUState *env) +{ + return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); +} + +#include "exec-all.h" + +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +{ + env->pc = tb->pc; +} #endif diff --git a/target-cris/exec.h b/target-cris/exec.h index 491f17c..9838159 100644 --- a/target-cris/exec.h +++ b/target-cris/exec.h @@ -27,14 +27,3 @@ register struct CPUCRISState *env asm(AREG0); #if !defined(CONFIG_USER_ONLY) #include "softmmu_exec.h" #endif - -static inline int cpu_has_work(CPUState *env) -{ - return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); -} - -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) -{ - env->pc = tb->pc; -} - diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 714f049..092827f 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -960,6 +960,36 @@ static inline int cpu_mmu_index (CPUState *env) return (env->hflags & HF_CPL_MASK) == 3 ? 1 : 0; } +#undef EAX +#define EAX (env->regs[R_EAX]) +#undef ECX +#define ECX (env->regs[R_ECX]) +#undef EDX +#define EDX (env->regs[R_EDX]) +#undef EBX +#define EBX (env->regs[R_EBX]) +#undef ESP +#define ESP (env->regs[R_ESP]) +#undef EBP +#define EBP (env->regs[R_EBP]) +#undef ESI +#define ESI (env->regs[R_ESI]) +#undef EDI +#define EDI (env->regs[R_EDI]) +#undef EIP +#define EIP (env->eip) +#define DF (env->df) + +#define CC_SRC (env->cc_src) +#define CC_DST (env->cc_dst) +#define CC_OP (env->cc_op) + +/* float macros */ +#define FT0 (env->ft0) +#define ST0 (env->fpregs[env->fpstt].d) +#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d) +#define ST1 ST(1) + /* translate.c */ void optimize_flags_init(void); @@ -984,6 +1014,23 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) #include "hw/apic.h" #endif +static inline int cpu_has_work(CPUState *env) +{ + return ((env->interrupt_request & CPU_INTERRUPT_HARD) && + (env->eflags & IF_MASK)) || + (env->interrupt_request & (CPU_INTERRUPT_NMI | + CPU_INTERRUPT_INIT | + CPU_INTERRUPT_SIPI | + CPU_INTERRUPT_MCE)); +} + +#include "exec-all.h" + +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +{ + env->eip = tb->pc - tb->cs_base; +} + static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, target_ulong *cs_base, int *flags) { diff --git a/target-i386/exec.h b/target-i386/exec.h index 3d243d8..068e150 100644 --- a/target-i386/exec.h +++ b/target-i386/exec.h @@ -33,36 +33,6 @@ register struct CPUX86State *env asm(AREG0); #include "qemu-common.h" #include "qemu-log.h" -#undef EAX -#define EAX (env->regs[R_EAX]) -#undef ECX -#define ECX (env->regs[R_ECX]) -#undef EDX -#define EDX (env->regs[R_EDX]) -#undef EBX -#define EBX (env->regs[R_EBX]) -#undef ESP -#define ESP (env->regs[R_ESP]) -#undef EBP -#define EBP (env->regs[R_EBP]) -#undef ESI -#define ESI (env->regs[R_ESI]) -#undef EDI -#define EDI (env->regs[R_EDI]) -#undef EIP -#define EIP (env->eip) -#define DF (env->df) - -#define CC_SRC (env->cc_src) -#define CC_DST (env->cc_dst) -#define CC_OP (env->cc_op) - -/* float macros */ -#define FT0 (env->ft0) -#define ST0 (env->fpregs[env->fpstt].d) -#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d) -#define ST1 ST(1) - #include "cpu.h" #include "exec-all.h" @@ -284,16 +254,6 @@ static inline void load_eflags(int eflags, int update_mask) (eflags & update_mask) | 0x2; } -static inline int cpu_has_work(CPUState *env) -{ - return ((env->interrupt_request & CPU_INTERRUPT_HARD) && - (env->eflags & IF_MASK)) || - (env->interrupt_request & (CPU_INTERRUPT_NMI | - CPU_INTERRUPT_INIT | - CPU_INTERRUPT_SIPI | - CPU_INTERRUPT_MCE)); -} - /* load efer and update the corresponding hflags. XXX: do consistency checks with cpuid bits ? */ static inline void cpu_load_efer(CPUState *env, uint64_t val) @@ -305,9 +265,3 @@ static inline void cpu_load_efer(CPUState *env, uint64_t val) if (env->efer & MSR_EFER_SVME) env->hflags |= HF_SVME_MASK; } - -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) -{ - env->eip = tb->pc - tb->cs_base; -} - diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h index 8e2d26b..0a6af70 100644 --- a/target-lm32/cpu.h +++ b/target-lm32/cpu.h @@ -241,4 +241,17 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, *cs_base = 0; *flags = 0; } + +static inline int cpu_has_work(CPUState *env) +{ + return env->interrupt_request & CPU_INTERRUPT_HARD; +} + +#include "exec-all.h" + +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +{ + env->pc = tb->pc; +} + #endif diff --git a/target-lm32/exec.h b/target-lm32/exec.h index 348b723..61eb914 100644 --- a/target-lm32/exec.h +++ b/target-lm32/exec.h @@ -24,11 +24,6 @@ register struct CPULM32State *env asm(AREG0); #include "cpu.h" #include "exec-all.h" -static inline int cpu_has_work(CPUState *env) -{ - return env->interrupt_request & CPU_INTERRUPT_HARD; -} - static inline int cpu_halted(CPUState *env) { if (!env->halted) { @@ -42,9 +37,3 @@ static inline int cpu_halted(CPUState *env) } return EXCP_HALTED; } - -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) -{ - env->pc = tb->pc; -} - diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h index 4d8ba28..38f38d1 100644 --- a/target-m68k/cpu.h +++ b/target-m68k/cpu.h @@ -255,4 +255,16 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, | ((env->macsr >> 4) & 0xf); /* Bits 0-3 */ } +static inline int cpu_has_work(CPUState *env) +{ + return env->interrupt_request & (CPU_INTERRUPT_HARD); +} + +#include "exec-all.h" + +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +{ + env->pc = tb->pc; +} + #endif diff --git a/target-m68k/exec.h b/target-m68k/exec.h index f63e849..568260c 100644 --- a/target-m68k/exec.h +++ b/target-m68k/exec.h @@ -27,14 +27,3 @@ register struct CPUM68KState *env asm(AREG0); #if !defined(CONFIG_USER_ONLY) #include "softmmu_exec.h" #endif - -static inline int cpu_has_work(CPUState *env) -{ - return env->interrupt_request & (CPU_INTERRUPT_HARD); -} - -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) -{ - env->pc = tb->pc; -} - diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h index 78fe14ff..21c68c0 100644 --- a/target-microblaze/cpu.h +++ b/target-microblaze/cpu.h @@ -350,4 +350,17 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, int is_asi, int size); #endif + +static inline int cpu_has_work(CPUState *env) +{ + return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); +} + +#include "exec-all.h" + +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +{ + env->sregs[SR_PC] = tb->pc; +} + #endif diff --git a/target-microblaze/exec.h b/target-microblaze/exec.h index af102d6..b7f85cf 100644 --- a/target-microblaze/exec.h +++ b/target-microblaze/exec.h @@ -26,14 +26,3 @@ register struct CPUMBState *env asm(AREG0); #if !defined(CONFIG_USER_ONLY) #include "softmmu_exec.h" #endif - -static inline int cpu_has_work(CPUState *env) -{ - return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); -} - -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) -{ - env->sregs[SR_PC] = tb->pc; -} - diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 0b98d10..b0ac4da 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -656,4 +656,28 @@ static inline void cpu_set_tls(CPUState *env, target_ulong newtls) env->tls_value = newtls; } +static inline int cpu_has_work(CPUState *env) +{ + int has_work = 0; + + /* It is implementation dependent if non-enabled interrupts + wake-up the CPU, however most of the implementations only + check for interrupts that can be taken. */ + if ((env->interrupt_request & CPU_INTERRUPT_HARD) && + cpu_mips_hw_interrupts_pending(env)) { + has_work = 1; + } + + return has_work; +} + +#include "exec-all.h" + +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +{ + env->active_tc.PC = tb->pc; + env->hflags &= ~MIPS_HFLAG_BMASK; + env->hflags |= tb->flags & MIPS_HFLAG_BMASK; +} + #endif /* !defined (__MIPS_CPU_H__) */ diff --git a/target-mips/exec.h b/target-mips/exec.h index 607edf1..a3a7262 100644 --- a/target-mips/exec.h +++ b/target-mips/exec.h @@ -17,21 +17,6 @@ register struct CPUMIPSState *env asm(AREG0); #include "softmmu_exec.h" #endif /* !defined(CONFIG_USER_ONLY) */ -static inline int cpu_has_work(CPUState *env) -{ - int has_work = 0; - - /* It is implementation dependent if non-enabled interrupts - wake-up the CPU, however most of the implementations only - check for interrupts that can be taken. */ - if ((env->interrupt_request & CPU_INTERRUPT_HARD) && - cpu_mips_hw_interrupts_pending(env)) { - has_work = 1; - } - - return has_work; -} - static inline void compute_hflags(CPUState *env) { env->hflags &= ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 | @@ -73,11 +58,4 @@ static inline void compute_hflags(CPUState *env) } } -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) -{ - env->active_tc.PC = tb->pc; - env->hflags &= ~MIPS_HFLAG_BMASK; - env->hflags |= tb->flags & MIPS_HFLAG_BMASK; -} - #endif /* !defined(__QEMU_MIPS_EXEC_H__) */ diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 7a6a7df..2abc82c 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1999,4 +1999,16 @@ static inline ppcemb_tlb_t *booke206_get_tlbe(CPUState *env, const int tlbn, extern void (*cpu_ppc_hypercall)(CPUState *); +static inline int cpu_has_work(CPUState *env) +{ + return msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD); +} + +#include "exec-all.h" + +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +{ + env->nip = tb->pc; +} + #endif /* !defined (__CPU_PPC_H__) */ diff --git a/target-ppc/exec.h b/target-ppc/exec.h index fbc0a06..1e144be 100644 --- a/target-ppc/exec.h +++ b/target-ppc/exec.h @@ -32,15 +32,4 @@ register struct CPUPPCState *env asm(AREG0); #include "softmmu_exec.h" #endif /* !defined(CONFIG_USER_ONLY) */ -static inline int cpu_has_work(CPUState *env) -{ - return msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD); -} - - -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) -{ - env->nip = tb->pc; -} - #endif /* !defined (__PPC_H__) */ diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 74ff97a..e61eabc 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -361,4 +361,17 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, | (env->movcal_backup ? TB_FLAG_PENDING_MOVCA : 0); /* Bit 4 */ } +static inline int cpu_has_work(CPUState *env) +{ + return env->interrupt_request & CPU_INTERRUPT_HARD; +} + +#include "exec-all.h" + +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +{ + env->pc = tb->pc; + env->flags = tb->flags; +} + #endif /* _CPU_SH4_H */ diff --git a/target-sh4/exec.h b/target-sh4/exec.h index e52838c..a537672 100644 --- a/target-sh4/exec.h +++ b/target-sh4/exec.h @@ -27,19 +27,8 @@ register struct CPUSH4State *env asm(AREG0); #include "cpu.h" #include "exec-all.h" -static inline int cpu_has_work(CPUState *env) -{ - return env->interrupt_request & CPU_INTERRUPT_HARD; -} - #ifndef CONFIG_USER_ONLY #include "softmmu_exec.h" #endif -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) -{ - env->pc = tb->pc; - env->flags = tb->flags; -} - #endif /* _EXEC_SH4_H */ diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index eff006c..3287faf 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -660,4 +660,18 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, /* helper.c */ void do_interrupt(CPUState *env); +static inline int cpu_has_work(CPUState *env1) +{ + return (env1->interrupt_request & CPU_INTERRUPT_HARD) && + cpu_interrupts_enabled(env1); +} + +#include "exec-all.h" + +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +{ + env->pc = tb->pc; + env->npc = tb->cs_base; +} + #endif diff --git a/target-sparc/exec.h b/target-sparc/exec.h index becdaf5..2395b00 100644 --- a/target-sparc/exec.h +++ b/target-sparc/exec.h @@ -12,18 +12,4 @@ register struct CPUSPARCState *env asm(AREG0); #include "softmmu_exec.h" #endif /* !defined(CONFIG_USER_ONLY) */ -/* op_helper.c */ -static inline int cpu_has_work(CPUState *env1) -{ - return (env1->interrupt_request & CPU_INTERRUPT_HARD) && - cpu_interrupts_enabled(env1); -} - - -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) -{ - env->pc = tb->pc; - env->npc = tb->cs_base; -} - #endif diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h index 1e10049..bd622c7 100644 --- a/target-unicore32/cpu.h +++ b/target-unicore32/cpu.h @@ -179,4 +179,10 @@ void uc32_translate_init(void); void do_interrupt(CPUState *); void switch_mode(CPUState_UniCore32 *, int); +static inline int cpu_has_work(CPUState *env) +{ + return env->interrupt_request & + (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB); +} + #endif /* __CPU_UC32_H__ */ diff --git a/target-unicore32/exec.h b/target-unicore32/exec.h index 4ab55f4..6b9b499 100644 --- a/target-unicore32/exec.h +++ b/target-unicore32/exec.h @@ -26,12 +26,6 @@ static inline void regs_to_env(void) { } -static inline int cpu_has_work(CPUState *env) -{ - return env->interrupt_request & - (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB); -} - static inline int cpu_halted(CPUState *env) { if (!env->halted) { diff --git a/xen-mapcache-stub.c b/xen-mapcache-stub.c index 7c14b3d..0760688 100644 --- a/xen-mapcache-stub.c +++ b/xen-mapcache-stub.c @@ -8,6 +8,7 @@ #include "config.h" +#include "cpu.h" #include "exec-all.h" #include "qemu-common.h" #include "cpu-common.h" -- 1.7.2.5