Re: [Qemu-devel] [RFC v1] Add declarations for hierarchical memory region API

[Richard Henderson]

On 05/20/2011 02:23 AM, Avi Kivity wrote:
> On 05/19/2011 11:43 PM, Anthony Liguori wrote:
>> On 05/19/2011 09:12 AM, Avi Kivity wrote:
>>> The memory API separates the attributes of a memory region (its size, how
>>> reads or writes are handled, dirty logging, and coalescing) from where it
>>> is mapped and whether it is enabled.  This allows a device to configure
>>> a memory region once, then hand it off to its parent bus to map it according
>>> to the bus configuration.
>>>
>>> Hierarchical registration also allows a device to compose a region out of
>>> a number of sub-regions with different properties; for example some may be
>>> RAM while others may be MMIO.
>>>
>>> +    struct {
>>> +        /* If nonzero, specify bounds on access sizes beyond which a 
>>> machine
>>> +         * check is thrown.
>>> +         */
>>> +        unsigned min_access_size;
>>> +        unsigned max_access_size;
>>> +        /* If true, unaligned accesses are supported.  Otherwise unaligned
>>> +         * accesses throw machine checks.
>>> +         */
>>> +         bool unaligned;
>>> +    } valid;
>>
>> Under what circumstances would this be used?
>>
>> The behavior of devices that receive non-natural accesses varies wildly.
>>
>> For PCI devices, invalid accesses almost always return ~0.  I can't think of 
>> a device where an MCE would occur.
> 
> This was requested by Richard, so I'll let him comment.
> 

Several alpha system chips MCE when accessed with incorrect sizes.
E.g. only 64-bit accesses are allowed.

Is this structure honestly any better than 4 function pointers?
I can't see that it is, myself.


r~