Re: [Qemu-devel] [PATCH 01/27] Clean up PowerPC SLB handling code

[David Gibson]

On Thu, May 19, 2011 at 07:35:30AM +0200, Andreas Färber wrote:
> Am 25.03.2011 um 04:21 schrieb David Gibson:
> 
> >Currently the SLB information when emulating a PowerPC 970 is
> >storeed in a structure with the unhelpfully named fields 'tmp'
> >and 'tmp64'.  While the layout in these fields does match the
> >description of the SLB in the architecture document, it is not
> >convenient either for looking up the SLB, or for emulating the
> >slbmte instruction.
> >
> >This patch, therefore, reorganizes the SLB entry structure to be
> >divided in the the "ESID related" and "VSID related" fields as
> >they are divided in instructions accessing the SLB.
> >
> >In addition to making the code smaller and more readable, this will
> >make it easier to implement for the 1TB segments used in more
> >recent PowerPC chips.
> >
> >Signed-off-by: David Gibson <address@hidden>
> 
> According to my bisect, this patch broke ppc64 OpenBIOS.
> 
> David, would you please take a look?

Uh, sure.  can you describe the symptoms of the breakage, and the
exact qemu setup you've observed the problem with?

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson