Re: [Qemu-devel] [RFC 20/28] target-xtensa: implement windowed registers

[Blue Swirl]

On Wed, May 4, 2011 at 11:07 PM, Richard Henderson <address@hidden> wrote:
> On 05/04/2011 12:35 PM, Blue Swirl wrote:
>> On Wed, May 4, 2011 at 3:59 AM, Max Filippov <address@hidden> wrote:
>>> See ISA, 4.7.1 for details.
>>>
>>> Physical registers and currently visible window are separate fields in
>>> CPUEnv. Only current window is accessible to TCG. On operations that
>>> change window base helpers copy current window to and from physical
>>> registers.
>>
>> I'm not sure how the register windows work, but maybe you could use
>> the same trick used for Sparc. There is a pool of registers
>> (env->regbase[]), a register window pointer (env->regwptr,
>> cpu_regwptr) tracks which are the currently accessible ones. The
>> advantage is to avoid copying (not entirely for Sparc due to the
>> window overlap).
>
> Sparc loses out on some TCG optimizations because of that, although
> to be fair the most effective of these are still in Aurlien's trees.

Interesting. Which optimizations? What trees? How would you implement
the register windows then?