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[Qemu-devel] [PATCH v2 01/19] softfloat: use GCC builtins to count the l
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH v2 01/19] softfloat: use GCC builtins to count the leading zeros |
Date: |
Thu, 14 Apr 2011 01:10:56 +0200 |
Softfloat has its own implementation to count the leading zeros. However
a lot of architectures have either a dedicated instruction or an
optimized to do that. When using GCC >= 3.4, this patch uses GCC builtins
instead of the handcoded implementation.
Note that I amware that QEMU_GNUC_PREREQ is defined in osdep.h and that
clz32() and clz64() are defined in host-utils.h, but I think it is better
to keep the softfloat implemntation self contained.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
---
fpu/softfloat-macros.h | 29 +++++++++++++++++++++++++++--
1 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h
index 3128e60..e82ce23 100644
--- a/fpu/softfloat-macros.h
+++ b/fpu/softfloat-macros.h
@@ -36,6 +36,17 @@ these four paragraphs for those parts of this code that are
retained.
=============================================================================*/
/*----------------------------------------------------------------------------
+| This macro tests for minimum version of the GNU C compiler.
+*----------------------------------------------------------------------------*/
+#if defined(__GNUC__) && defined(__GNUC_MINOR__)
+# define SOFTFLOAT_GNUC_PREREQ(maj, min) \
+ ((__GNUC__ << 16) + __GNUC_MINOR__ >= ((maj) << 16) + (min))
+#else
+# define SOFTFLOAT_GNUC_PREREQ(maj, min) 0
+#endif
+
+
+/*----------------------------------------------------------------------------
| Shifts `a' right by the number of bits given in `count'. If any nonzero
| bits are shifted off, they are ``jammed'' into the least significant bit of
| the result by setting the least significant bit to 1. The value of `count'
@@ -616,6 +627,13 @@ static uint32_t estimateSqrt32( int16 aExp, uint32_t a )
static int8 countLeadingZeros32( uint32_t a )
{
+#if SOFTFLOAT_GNUC_PREREQ(3, 4)
+ if (a) {
+ return __builtin_clz(a);
+ } else {
+ return 32;
+ }
+#else
static const int8 countLeadingZerosHigh[] = {
8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
@@ -647,7 +665,7 @@ static int8 countLeadingZeros32( uint32_t a )
}
shiftCount += countLeadingZerosHigh[ a>>24 ];
return shiftCount;
-
+#endif
}
/*----------------------------------------------------------------------------
@@ -657,6 +675,13 @@ static int8 countLeadingZeros32( uint32_t a )
static int8 countLeadingZeros64( uint64_t a )
{
+#if SOFTFLOAT_GNUC_PREREQ(3, 4)
+ if (a) {
+ return __builtin_clzll(a);
+ } else {
+ return 64;
+ }
+#else
int8 shiftCount;
shiftCount = 0;
@@ -668,7 +693,7 @@ static int8 countLeadingZeros64( uint64_t a )
}
shiftCount += countLeadingZeros32( a );
return shiftCount;
-
+#endif
}
/*----------------------------------------------------------------------------
--
1.7.2.3
- [Qemu-devel] [PATCH v2 00/19] softfloat and FPU fixes/improvements, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 04/19] target-i386: use float unions from cpu-all.h, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 05/19] target-i386: add floatx_{add, mul, sub} and use them, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 07/19] softfloat-native: add float*_unordered_quiet() functions, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 13/19] softfloat: move float*_eq and float*_eq_quiet, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 08/19] target-alpha: use new float64_unordered_quiet() function, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 01/19] softfloat: use GCC builtins to count the leading zeros,
Aurelien Jarno <=
- [Qemu-devel] [PATCH v2 03/19] target-i386: use CPU_LDoubleU instead of a private union, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 10/19] target-i386: fix CMPUNORDPS/D and CMPORDPS/D instructions, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 19/19] target-mips: clear softfpu exception state for comparison instructions, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 17/19] target-mips: don't hardcode softfloat exception bits, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 14/19] softfloat: improve description of comparison functions, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 18/19] target-mips: fix c.ps.* instructions, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 06/19] softfloat: add float*_unordered_{, quiet}() functions, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 09/19] target-mips: use new float*_unordered*() functions, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 12/19] softfloat: rename float*_eq_signaling() into float*_eq(), Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 15/19] target-ppc: fix SPE comparison functions, Aurelien Jarno, 2011/04/13